> High Performance, Low Power AVR ծ 8-bit Microcontroller ? > Advanced RISC Architecture129 Powerful Instructions - Most Single Clock Cycle Execution֖32 x 8 General Purpose Working RegistersFully Static Operation ֖Up to 1 MIPS throughput per MHzOn-chip 2-cycle Multiplier ? > Data and Non-Volatile Program Memory֖8K Bytes Flash of In-System Programmable Program Memory ?Endurance: 10,000 Write/Erase CyclesOptional Boot Code Section with Independent Lock Bits ? > In-System Programming by On-chip Boot Program ? > True Read-While-Write Operation֖512 Bytes of In-System Programmable EEPROM ? > Endurance: 100,000 Write/Erase Cycles512 Bytes Internal SRAM ֖Programming Lock for Flash Program and EEPROM Data Security ? > On Chip Debug Interface (debugWIRE) ? > Peripheral FeaturesTwo or three 12-bit High Speed PSC (Power Stage Controllers) with 4-bit Resolution Enhancement?Non Overlapping Inverted PWM Output Pins With Flexible Dead-Time ?Variable PWM duty Cycle and Frequency ?Synchronous Update of all PWM Registers?Auto Stop Function for Event Driven PFC Implementation?Less than 25 Hz Step Width at 150 kHz Output Frequency ?PSC2 with four Output Pins and Output Matrix֖One 8-bit General purpose Timer/Counter with Separate Prescaler and Capture ModeOne 16-bit General purpose Timer/Counter with Separate Prescaler, Compare Mode and Capture Mode֖Programmable Serial USART?Standard UART mode ?16/17 bit Biphase Mode for DALI CommunicationsMaster/Slave SPI Serial Interface ֖10-bit ADC?Up To 11 Single Ended Channels and 2 Fully Differential ADC Channel Pairs?Programmable Gain (5x, 10x, 20x, 40x on Differential Channels) ?Internal Reference Voltage10-bit DAC֖Two or three Analog Comparator with Resistor-Array to Adjust Comparison Voltage4 External Interrupts ֖Programmable Watchdog Timer with Separate On-Chip Oscillator ? > Special Microcontroller FeaturesLow Power Idle, Noise Reduction, and Power Down Modes֖Power On Reset and Programmable Brown Out Detection Flag Array in Bit-programmable I/O Space (4 bytes) 4317I֖AVR01/08 size="-2">

S024 Pin NumberSO32 Pin NumberQFN32 Pin NumberMnemonicTypeName, Function & Alternate Function 684VCCpower Power Supply: Analog Power Supply: This is the power supply voltage for analog partFor a normal use this pin must be connected.192521AREFPower 172319AVCCPower Analog Reference : reference for analog converter . This is the reference voltage of the A/D converter. As output, can be used by external analog8128PBOI/OMISO (SPI Master In Slave Out)PSCOUT20 output9139PB1I/OMOSI (SPI Master Out Slave In)PSCOUT21 output162016PB2I/OADC5 (Analog Input Channel5 )INT1202723PB3I/OAMP0- (Analog Differential...

Table 3-1. Pin out description (Continued) > S024 Pin NumberSO32 Pin NumberQFN32 Pin NumberMnemonicTypeName, Function & Alternate Function 1129PD0I/OPSCOUT00 outputXCK (UART Transfer Clock) SS_A (Alternate SPI Slave Select)3432PD1I/OPSCIN0 (PSC 0 Digital Input )CLKO (System Clock Output)451PD2I/OPSCIN2 (PSC 2 Digital Input) OC1A (Timer 1 Output Compare A)MISO_A (Programming & alternate SPI Master In Slave Out)562PD3I/OTXD (Dali/UART Tx data)OC0A (Timer 0 Output Compare A) SS (SPI Slave Select)MOSI_A (Programming & alternate Master Out SPI Slave In)121612PD4I/OADC1 (Analog Input Channel 1)RXD...

Data Bus 8-bit > 8Kx8 Flash ProgramCounter Statusand Control I/O LinesEEPROM512 bytes InterruptUnitSPIUnit ProgramMemory 32 x 8GeneralPurposeRegistrers > WatchdogTimer3 AnalogComparators DAC InstructionDecoder ALU DALI USART Control Lines Timer 0 > Direct AddressingIndirect Addressing Timer 1 DataSRAM512 bytes ADC PSC 2/1/0 >

The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI ports and interruptsystem to continue functioning. The Power-down mode saves the register contents but freezesthe Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. The ADC Noise Reduction mode stops the CPU and all I/O modules except ADC, to minimize switch-ing noise during ADC conversions. In Standby mode, the Crystal/Resonator Oscillator is runningwhile the rest of the device is sleeping. This allows very fast start-up combined with low power consumption. The device is manufactured...

4.2.5Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). ThePort D output buffers have symmetrical drive characteristics with both high sink and sourcecapability. As inputs, Port D pins that are externally pulled low will source current if the pull-upresistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running.Port D also serves the functions of various special features of the AT90PWM2/2B/3/3B as listedonpage 74. 4.2.6Port E (PE2..0) RESET/ XTAL1/XTAL2 Port E is...

The fast-access Register File contains 32 x 8-bit general purpose working registers with a singleclock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typ-ical ALU operation, two operands are output from the Register File, the operation is executed, and the result is stored back in the Register File in one clock cycle.Six of the 32 registers can be used as three 16-bit indirect address register pointers for DataSpace addressing ֖ enabling efficient address calculations. One of the these address pointers can also be used as an address pointer for look up...

T1T2T3T4 clk1st Instruction Fetch1st Instruction Execute2nd Instruction Fetch > CPU 2 nd Instruction Execute3rd Instruction Fetch3rd Instruction Execute4th Instruction Fetch > T1T2T3T4 clk > CPU Total Execution Time R egister Operands FetchALU Operation ExecuteResult Write Back >

in r16, SREG ; store SREG value cli ; disable interrupts during timed sequence sbi EECR, EEMWE ; start EEPROM write sbi EECR, EEWE out SREG, r16 ; restore SREG value (I-bit) > char cSREG;cSREG = SREG; /* store SREG value */ /* disable interrupts during timed sequence */ _CLI(); EECR |= (1<SREG = cSREG; >