Catalog excerpts
Product Brochure MP1800A Series Signal Quality Analyzer
Open the catalog to page 1Compact and High-performance BERT 32.1 Gbit/s Signal Quality Analyzer MP1800A SQA is a modular BERT with plug-in modules; • ulse Pattern Generator (PPG) supporting high quality output and high amplitude signals P E • rror Detector (ED) with high input sensitivity supporting signal analysis, such as Bathtub and Eye Diagram measurements • itter Modulation Source (JMS) for generating various types of jitter, such as SJ/RJ/BUJ/SSC, and supporting Jitter Tolerance J tests MP1800A supports physical layers testing for optical modules and highspeed devices up to 32.1 Gbit/s. Combined use with the...
Open the catalog to page 2Low-jitter, High-quality Waveform Due to the modular platform design, the PPG/ED modules can be configured with various other modules to configure custom systems. The number of channels per 28G/32G PPG/ED module can be selected from 1, 2, or 4 and PPG/ED modules can be installed to support up to 8ch. Moreover, since each channel pattern can be synchronized, D/A converters, MUX/DEMUX, crosstalk, and skew tolerance can be evaluated. The PPG module supports low-jitter and high-quality waveforms. The output amplitude can be customized to application needs. Low-jitter: 700 fs rms (typ.) High...
Open the catalog to page 34PAM/8PAM Signal Generation Combining the Anritsu MZ1834A/MZ1838A 4/8 PAM Converter with the MP1800A Signal Quality Analyzer supports generation of both 4PAM and 8PAM signals for R&D High Speed Back Plane and 400GbE R&D. The MP1800A high-quality NRZ waveform and wideband passive PAM converter generate high-quality PAM signals with assured S/N. SJ, RJ, BUJ and SSC Jitter Generation Supporting 32.1 Gbit/s The intrinsic jitter of the clock output from the MU181500B Jitter Modulation Source is less than 350 fs rms. The combination of low-jitter waveform with excellent jitter transparency...
Open the catalog to page 4The combination of low-jitter, high-quality output waveform, and high-amplitude output PPG and MUX modules can be tailored to the application. 10 Gbit/s, PRBS31, Maximum amplitude Pseudorandom patterns (PRBS) Because all PRBS rates required by the standards are supported Zero Substitution Pattern All 0s and All 1s patterns can be added to PRBS patterns for performing CDR tolerance tests. Data Pattern Patterns required by each application can be created with flexibility. Alternate Pattern Mixed Pattern A mixed data and PRBS pattern can be output. At creation of SONET/SDH frames, adding a...
Open the catalog to page 5For confirming DATA threshold and phase margins. Used to obtain bit error rate contours linking specified bit error rate points. Calculates Q value from bit error rate using change in threshold value. Can be used to check change in Q value for clock phase. Performs optimum bit error rate based on changes in bit error rate relative to phase. And performs jitter analysis (TJ, DJ, RJ). Bit Error Analysis using ISI Used to confirm bit error rate in each specified block or bit position and for bit error rate correlation with inter-symbol interference. F ∗: unctions and specifications are...
Open the catalog to page 6• Direct driving of EML and EA module using 3.5 Vp-p high-amplitude waveform • Wide cross point adjustment function: 20 to 90% [MU181020A/B-013] Upstream (Burst Mode) Test for OLT module Continuous Data ■ Each PPG slot can output pre-bias and reset signals for the PON BER test. (Level: H: 0 V, L: -1 V) ■ The PON OLT Upstream test can be performed at up to 12.5 Gbit/s using one MP1800A. . „„-r. High Speed Interconnect Device/Back Plane • 32.1 Gbit/s Multi-channel signal generation • Jitter Tolerance test • Emphasis efficiency check • Crosstalk test
Open the catalog to page 7Jitter Modulator Simultaneous 8ch (2 x 4ch end-to-end) BER measurement Crosstalk test Jitter Tolerance test Bathtub Jitter, Eye Diagram analysis • Optical output waveform optimization using cross-point adjustment • Inter-lane timing and skew control • High-quality and high-amplitude waveform ideal for EML module evaluation (3.5 Vp-p option)
Open the catalog to page 8Application 6: 100 Gbit/s DP-QPSK Evaluation P re-coding signal generator synchronized between channels O ptical output waveform optimization using cross-point adjustment T iming control and skew control between channels H igh-quality and high-amplitude waveform ideal for EML module evaluation (3.5 Vp-p option) Application 7: 40 Gbit/s Band DQPSK Optical Module/Device Evaluation RZ-DQPSK Demodulator RZ-DQPSK Modulator MG3693C RF/Microwave Signal Generator • igh-quality and high-amplitude waveform ideal for phase modulator evaluation (3.5 Vp-p option) H • valuation using 40 Gbit/s DQPSK...
Open the catalog to page 9Panel Layout MP1800A Signal Quality Analyzer (6-Slot) 6 Ground This terminal is used to discharge static electricity. Power Panel Lock/Remote This key locks the panel operation keys. Screen Copy This key copies the currently displayed screen. System Alarm The key LED lights at a system error and a dialog explaining the error contents is displayed. Display 8.4-inch Color TFT 800 × 600 pixels Slot Keys These keys correspond to the operation screen for each installed module. Customize Key This key is used to call up to eighteen commonly used screens. Rotary Encoder When the [Edit] key lamp is...
Open the catalog to page 10Ground This terminal is used to discharge static electricity. Power Slots for Modules These slots are for installing up to four modules. Main frame ID Used to identify the MT1810A units when one host PC controls multiple (up to 4) MT1810A units. Volume This knob increases and decreases the volume of measurement error alarm. Ethernet This unit has two RJ45 Ethernet jacks supporting connection to 10 BASE-T or 100 BASE-TX cables. AC Inlet This socket is for connecting the 3-wire power cord. GPIO Reserved for future use.
Open the catalog to page 11MP1800 Series Modules ● MU181000A 12.5 GHz Synthesizer 10 MHz Buff Output 10 MHz Ref Input 100 MHz Ref Input∗1 Ext I, Q∗1 Output for 10 MHz reference clock Input for 10 MHz reference clock Input for 100 MHz reference clock Input for I, Q signal Output for 1/64 clock or 1/1 clock Jitter Ext Clock Output Input for jitter modulation signal Clock output 10 MHz Buff Output 10 MHz Ref Input 100 MHz Ref Input∗2 Ext I, Q∗2 Output for 10 MHz reference clock Input for 10 MHz reference clock Input for 100 MHz reference clock Input for I, Q signal Output for 1/64 clock or 1/1 clock Jitter Ext Clock...
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