eDP 1.4a-compliant TCON with PSR and Selective Update PSR (PSR2) The ANX2684 is an eDP 1.4a-compliant TCON with Panel Self Refresh (PSR) and Selective Update PSR (PSR2) functions. The ANX2684 features Rapid Link™ and QuietLink™. The Rapid Link feature allows for instantaneous clock recovery for no-link training wake-up and the QuietLink feature reduces DisplayPort voltage swing, which helps reducing power consumption. The ANX2684 has Analogix-patented low power consumption technology of Gapless architecture. It has stack LPDDR2 die inside package to support PSR and PSR2 feature. The DRAM size is 256M bits (4x64M). It also supports Instant-on feature. Figure 1 1 shows the system block diagram of the eDP TCON chip... • Resolution supported: up to 3240 x 2160 display resolution; color depth supported: 18/24bpp (input), 24bpp (output) - Compliant with DisplayPort standard v1.3 and eDP standard v1.4a - Down-spread spectrum supported (0.5% down spread) - Alternate Scrambler Seed Reset (ASSR) for eDP Display Authentication and Content Protection - Normal/Fast/No link training - EDID access through AUX channel - Support eDP 1.4a panel functions - Support DRRs/NvDRRs/SDRRs functions • Adaptive Sync function and Direct Drive G-Sync. - Supports up to 16-channels with 1D/1C and up to 8-channels 2D/1C configuration. - EPI PHY supports output swing level control - On-chip SSCG (Max. +/-1% with 0.25 step, 10/20/30/40KHz, center spreading) - Support various swap modes: inter-port swap, intra-port swap, P/N swap, RGB swap, Odd/Even pixel swap etc. - Support Scan direction swap - Support Dual CTR1 package iteration - Support 5 types of POL polarity control method - Z-inversion(column inversion),and N-line inversion - Programmable charge share control including disable - EPI test pattern mode - iSP PHY support output swing level control - iSP output support +/- 1% spread-spectrum clocking - Support various swap modes: inter-port swap, intra-port swap, p/n swap, RGB swap, odd/even pixel swap etc. - Support Scan direction swap - Support Z-inversion(column inversion),and N-line inversion - Support iSP test pattern mode • TCON function - Support Gate D-IC /GIP/Overlap Driving/Multi Driving/4,6,8 phase simple GIP through GPIO - Power-up gate output masking to avoid DC/DC over-loading - Programmable Fail-safe mode control - Configurable BIST pattern - Support various FRC pattern configurations - Support LGD LRR Sharp LRD function • ffllnstant-on feature • HCommunication Interface - I2C Master for EEPROM loading, support the Fast-mode, typical the bit rate at 330 kbit/s - I2C Slave #1(SN_SCL, SN_SDA) and I2C Slave #2(ARC_SCL, ARC_SDA), up to 1Mbit/s speed - I2C Slave #1 share pinout with SPI Slave - I2C Slave #2 share pinout with TCON I2C Slave

Bring Vision to Life • LC frequency: 27M±300KHz (with eFuse applied) • Clock spreading on DDR interface to suppress EMI • Support Video BIST, SRAM BIST and video CRC • EEPROM shared for EDID and panel configuration • Support shadow EDID inside TCON • EDID and configuration content check-sum support, and support CRC32 check for Instant On PNG data • Rapid Link provided • QuietLink provided • Pin-to-pin compatible with ANX2604 Product Brief • Power supply: 1.8V/1.25V/1.0V (3.3V generated internally for HPD output) • Package: 144-pin BGA (8x18); package size: 5.5x12x1.0mm (WxLxH) • Power consumption...

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