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SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing

SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing
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SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing

Product catalog summary
Overview: The SSM4567 is a digital input Class-D audio amplifier with an integrated boost converter, designed for mobile devices. It offers high output power and efficiency, with features to minimize noise and extend battery life.
Key Features:
  • Filterless Class-D amplifier with spread-spectrum Σ-Δ modulation.
  • Integrated boost regulator providing 5.1 V output.
  • Supports PDM, TDM, and I2S data formats.
  • Delivers 2.5 W into a 4 Ω load with less than 1% THD + N.
  • High system efficiency of 89.7% into 8 Ω at 1 W.
  • Advanced protection features including short-circuit and thermal protection.
Specifications:
  • Output power: 2.5 W into 4 Ω, 1.42 W into 8 Ω at 3.6 V supply.
  • THD + N: 0.025% at 1 kHz, 500 mW output power.
  • Signal-to-noise ratio: 104 dB, A-weighted.
  • Quiescent power consumption: 19.8 mW.
  • Operating temperature range: -40°C to +85°C.
Functional Description: The SSM4567 integrates a DAC, power amplifier, and digital audio interfaces on a single chip. It supports digital audio transmission, reducing noise interference and eliminating the need for input coupling capacitors. The device can be controlled via I2C, PDM, or TDM, and also operates in standalone mode.
Applications: Ideal for mobile handsets, tablets, and portable media players due to its compact size and high efficiency.
Protection and Efficiency: The amplifier includes pop-and-click suppression, flexible battery monitoring, and automatic gain control to manage output power and extend battery life. It also features a high-efficiency modulation scheme that reduces EMI emissions.
Conclusion: The SSM4567 is a versatile and efficient solution for portable audio applications, offering high power output, low noise, and robust protection features in a compact package.
Absolute Maximum Ratings: The SSM4567 has specific absolute maximum ratings that must not be exceeded to avoid permanent damage, including a VBAT supply voltage range of -0.3 V to +6 V and an IOVDD supply voltage range of -0.3 V to +2 V.
Thermal Resistance: The thermal resistance for the 19-Ball WLCSP package is 57.73 °C/W.
Pin Configuration and Function Descriptions: The SSM4567 features a detailed pin configuration with specific functions for each pin, supporting various interface modes including PDM and I2S/TDM.
Typical Performance Characteristics: Graphs show Total Harmonic Distortion plus Noise (THD+N) versus output power and frequency under different conditions.
Theory of Operation: The SSM4567 operates in several modes, including PDM and PCM formats, requiring a clock input for operation.
Power Supplies and Control: The device requires VBAT and IOVDD power supplies, with power-down features and a power-on reset/voltage supervisor.
PDM Mode Setup and Control: The SSM4567 can operate using 1-bit PDM data for input and sense outputs, with specific timing parameters for PDM operation.
PDM Mode and I2C Control: In PDM mode, control information is managed by PDM pattern control by default. I2C control can be used instead, but not simultaneously with PDM pattern control.
PDM Pattern Control: PDM mode uses an 8-bit repeating pattern to control device functionalities, such as low power states.
PDM Channel Selection: The LR_SEL/ADDR pin selects the input channel in PDM pattern control mode.
PCM Mode Pin Setup and Control: PCM mode is activated by tying the SEL pin to IOVDD.
PCM Digital Audio Serial Interface: The SSM4567's serial audio interface supports I2S, left justified, PCM, or TDM formatted data.
Serial Data Placement: The SSM4567 allows flexible data placement within frames, with control bits for input and output data.
Stereo (I2S/Left Justified) Operating Mode: Stereo modes use FSYNC signal edges for data placement.
TDM Operating Mode: TDM mode allows multiple chips on a single serial interface bus.
Data Input and Output Configuration: The DAC_PDM_DAT/DAC_SDATAI pin can handle 16-bit or 24-bit data.
Multichip I2S Operating Mode: This mode is enabled by setting the MC_I2S control register.
System Gain: The default analog gain maps a 0 dBFS input level to 5.1 V peak at the amplifier output.
Output Current and Voltage Sensing: The SSM4567 uses an on-chip sense resistor for output current sensing.
VBAT Sensing: An 8-bit ADC measures the VBAT supply voltage in real-time.
Limiter and Battery Tracking Threshold Control: The SSM4567 includes an output limiter to control peak output voltage.
I2C Control: The SSM4567 supports I2C communication, always acting as a slave.
TDM Control Interface: The device supports control data over the serial audio interface.
Standalone Mode Configuration: The SSM4567 operates in standalone mode by pulling up the LR_SEL/ADDR pin to IOVDD with a 47 kΩ resistor.
EMI Noise Management: The device uses proprietary modulation and spread-spectrum technology to minimize EMI emissions.
Output Modulation: The SSM4567 employs five-level, Σ-Δ output modulation.
Integrated Boost Converter: The boost converter steps up the VBAT supply to a higher VOUT voltage of 5.1 V.
Component Selection for Boost Regulators: Inductor selection is crucial, with the maximum input current determining the inductor value.
Layout Considerations: Proper PCB layout is essential to minimize voltage drops and inductance.
Power Supply Decoupling: Proper decoupling with low ESL and ESR capacitors is necessary to ensure high efficiency and low distortion.
Typical Application Circuits: Various configurations are provided for different modes, including software control and standalone modes.
Registers Overview: The document details various control registers and their configurations, crucial for the operation of the device.
Power Control Register: Enables auto power-down, controls battery voltage sense, and more.
AMP and Sense Control Register: Controls sense sample rate, high pass filter, and amplifier analog gain selection.
DAC Control Register: Manages DAC hard volume, mute control, and sample rate selection.
DAC Volume Control Register: Provides volume control ranging from +24 dB to mute.
Serial Audio Interface Control Registers: Configure serial audio interface modes and data formats.
Battery Voltage Output Register: Provides an 8-bit unsigned battery voltage output.
Limiter Control Registers: Control limiter ratio and battery voltage inflection point.
Status Registers: Monitor various fault conditions such as boost fault and overtemperature.
Fault Control Register: Controls gain reduction during thermal warnings and sets autorecovery attempts for faults.
PDM Control Register: Manages PDM channel selection and pattern control.
MCLK Ratio Setting Register: Allows setting of the master clock ratio.
Boost Control Registers: Adjust PMOS driver speed and enable output discharge switch.
Soft Reset Register: Initiates a soft reset when the value 0x00 is written to this register.
Outline Dimensions: Provides dimensions for the 19-Ball Wafer Level Chip Scale Package (WLCSP).
Ordering Guide: Lists available models and their temperature ranges, package descriptions, and options.
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Catalog excerpts

SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing-1

Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing SSM4567 Data Sheet FEATURES Output noise: 21.7 μV rms, A-weighted THD + N: 0.025% at 1 kHz, 500 mW output power PSSR: 90 dB at 217 Hz, with dither input 72 dB signal-to-noise ratio (SNR) on output current sensing and 77 dB SNR on voltage sensing Quiescent power consumption: 19.8 mW Pop-and-click suppression Flexible battery monitoring AGC Short-circuit protection for boost and Class-D outputs and thermal protection with automatic recovery Smart power-down when PDM stop condition or no clock input detected DC blocking high-pass filter and static input DC protection for PDM input Selectable ultralow EMI emissions and low latency modes Filterless Class-D amplifier with spread-spectrum Σ-Δ modulation with integrated boost regulator (5.1 V) Digitized output of output voltage, output current, and VBAT supply voltage Integrated boost regulator Multiple serial data formats PDM input/output TDM slave with support for up to 8 chips on a single bus I2S or left justified slave Multichip I2S with support for up to 4 chips on one I2S bus 8 kHz to 192 kHz PCM sample rates 2.048 to 6.14 MHz PDM input sample rates Configurable via I2C control, TDM control, or PDM patterns Standalone control modes 2.5 W into 4 Ω load and 1.42 W into 8 Ω load at 3.6 V supply with <1% total harmonic distortion plus noise (THD + N) Available in 19-ball, 1.74 mm × 2.1 mm, 0.4 mm pitch WLCSP 89.7% system efficiency into 8 Ω at 1 W, VBAT = 3.6 V APPLICATIONS Mobile handsets Tablets Portable media players FUNCTIONAL BLOCK DIAGRAM LR_SEL/ ADDR DAC_PDM_DAT/ DAC_SDATAI FILTERING MODULATION DAC_PDM_CLK/ BCLK SNS_PDM_CLK/ FSYNC SNS_PDM_DAT/ SNS_SDATAO Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

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SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing-3

Data Sheet REVISION HISTORY 4/14—Revision 0: Initial Version

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SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing-4

Data Sheet GENERAL DESCRIPTION The SSM4567 is a digital input Class-D power amplifier that includes an integrated boost converter, allowing higher output power than with a normal battery supply. This means that maximum output power is constant across the battery voltage range. The SSM4567 is ideal for power sensitive applications where system noise can corrupt the small analog signal sent to the amplifier, such as mobile phones, tablets, and portable media players. The SSM4567 combines an audio digital-to-analog converter (DAC), a power amplifier, and PDM or PCM (I2S/TDM) digital audio interfaces...

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SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing-5

Data Sheet SPECIFICATIONS VBAT = 3.6 V, IOVDD = 1.8 V, TA = 25°C, RL = 8 Ω + 33 µH, VBST = 5.1 V, 20 Hz to 20 kHz bandwidth (BW), unless otherwise noted. In PDM operation, PDM clock = 3.072 MHz; for PCM operation, fS = 48 kHz. Table 1. Parameter AMPLIFIER CHARACTERISTICS Output Power/Channel System Efficiency Total Harmonic Distortion + Noise Output Voltage Noise Signal-to-Noise Ratio Average Switching Frequency Full-Scale Output Voltage Differential Output Offset Voltage POWER SUPPLIES Supply Voltage Range Power Supply Rejection Ratio Quiescent Supply Current VBAT IOVDD Shutdown Current VBAT...

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SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing-6

SSM4567 Parameter Current Sense Absolute Accuracy Current Sense Gain Drift VBAT Sense Full-Scale Range VBAT Sense Absolute Accuracy Current and Voltage Sense Linearity BOOST CONVERTER Output Voltage Input Current Limit Soft Start Current Limit Line Regulation Load Regulation Inductor Input Capacitor Output Capacitor PMOS Switch Resistance NMOS Switch Resistance Switching Frequency Efficiency AUTOMATIC GAIN CONTROL AGC Gain Attack Time AGC Gain Release Time Battery Inflection Point VBAT vs. Limiter Slope AGC Gain Step Size Data Sheet Symbol VOUT IMAX 1 10 10 RONP RONN fBOOSTSW ηBOOST VBAT = 3.6...

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SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing-7

Data Sheet ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings apply at 25°C, unless otherwise noted. VBAT Supply Voltage IOVDD Supply Voltage Storage Temperature Range Operating Temperature Range Junction Temperature Range Soldering Conditions Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended...

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SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing-8

Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 INDICATOR 2 LR_SEL/ ADDR SNS_PDM_CLK/ FSYNC DAC_PDM_CLK/ BCLK SNS_PDM_DAT/ SNS_SDATAO Mnemonic IOVDD AGND PGND BSTSW LR_SEL/ADDR SEL SNS_PDM_CLK/FSYNC BSTSW DAC_PDM_CLK/BCLK SNS_PDM_DAT/SNS_SDATAO VBST VBST DAC_PDM_DAT/DAC_SDATAI PGND OUTN SCL OUTP VBAT SDA Description I/O and Digital Power Analog Ground Power Amplifier Ground Boost Switch Left or Right Selection for PDM Input/I2C Address PDM or I2S/TDM Interface Mode Select PDM Output Clock for Sense Data in PDM Mode/Frame Synchronization Clock in I2S/TDM Mode Boost Switch PDM Input...

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SSM4567: Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing-9

Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 100 POUT = 50mW POUT = 250mW POUT = 500mW POUT = 1W POUT = 50mW POUT = 250mW POUT = 500mW POUT = 1W Figure 6. THD + N vs. Frequency at VBAT = 4.2 V, RL = 8 Ω and 33 µH Figure 3. THD + N vs. Output Power at RL = 8 Ω and 33 µH POUT = 50mW POUT = 250mW POUT = 500mW POUT = 1W POUT = 50mW POUT = 250mW POUT = 500mW POUT = 1W Figure 7. THD + N vs. Frequency at VBAT = 3.6 V, RL = 8 Ω and 33 µH Figure 4. THD + N vs. Output Power at RL = 4 Ω and 15 µH 10 Figure 5. THD + N vs. Frequency at VBAT = 5 V, RL = 8 Ω and 33 µH Figure 8. THD + N vs. Frequency at VBAT...

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