Dual 1 A, 18 V, Synchronous Step-Down Regulator with Fail-Safe Voltage Monitoring Data Sheet TYPICAL APPLICATION CIRCUIT Input voltage: 4.5 V to 18 V ±1.0% output accuracy Integrated MOSFET: 110 mΩ/60 mΩ typical Continuous output current: 1 A/1 A Power fail comparator generates warning Power-on reset with programmable delay timer Adjustable voltage monitor for power-down (Channel 2) Watchdog refresh input Dual phase with 180° out-of-phase operation Fixed switching frequency: 300 kHz Internal compensation and soft start Stable with low ESR output ceramic capacitors Precision enable input Power feedback during power-off UVLO, OCP, OVP, and thermal shutdown protection Figure 1. 100 VOUT = 3.3V VOUT = 5V APPLICATIONS EFFICIENCY (%) Industrial and instrumentation Healthcare and medical DC-to-DC point of load applications Figure 2. Efficiency vs. Output Current at VIN = 12 V, fSW = 300 kHz GENERAL DESCRIPTION The ADP2311 is a fully integrated, dual output, synchronous step-down dc-to-dc regulator. The regulator operates from input voltages of 4.5 V to 18 V, and the output can regulate down to 0.6 V. Each channel can provide up to 1 A of continuous output current. An on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. Accurate voltage monitoring circuitry and a power fail comparator provide a controlled power-up and power-down sequence to enhance system reliability. The ADP2311 integrates the high-side and low-side MOSFETs to provide a very high efficiency, compact solution. Both channels of the regulator run at 180° out of phase to reduce the input ripple current and the input capacitor size, thereby helping to lower system electromagnetic interference (EMI). The ADP2311 also integrates internal compensation and soft start circuitry to simplify the design. The ADP2311 also includes undervoltage lockout (UVLO), overvoltage protection (OVP), overcurrent protection (OCP), and thermal shutdown (TSD). The ADP2311 operates over the −40°C to +125°C junction temperature range and is available in a 24-lead LFCSP package. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

Data Sheet REVISION HISTORY 3/14—Revision A: Initial Version

Data Sheet FUNCTIONAL BLOCK DIAGRAM UVLO BOOST REGULATOR I1MAX SLOPE RAMP1 SOFT START CONTROL LOGIC AND MOSFET DRIVER WITH ANTI-CROSS PROTECTION VREG DRIVER PGND1 LOW-SIDE CURRENT – SENSE TIMER POR DELAY TIMER POWER-UP AND POWER-DOWN SEQUENCE CONTROL RSTO RESET GENERATOR HICCUP MODE BOOST REGULATOR CONTROL LOGIC AND MOSFET DRIVER WITH ANTI-CROSS PROTECTION VREG DRIVER PGND2 LOW-SIDE CURRENT SENSE + SOFT START

Data Sheet SPECIFICATIONS PVIN1 = PVIN2 = 12 V, TJ = −40°C to +125°C, unless otherwise noted. Table 1. Parameter POWER INPUT Power Input Voltage Range Quiescent Current (PVIN1 + PVIN2) Shutdown Current (PVIN1 + PVIN2) PVINx Undervoltage Lockout Threshold PVINx Rising PVINx Falling FEEDBACK FBx Regulation Voltage FBx Bias Current INTERNAL REGULATOR VREG Voltage Dropout Voltage Regulator Current Limit MOSFET ON RESISTANCE High-Side On Resistance Low-Side On Resistance CURRENT LIMIT High-Side Peak Current Limit Low-Side Source Current Limit Low-Side Sink Current Limit Hiccup Time SWITCH NODE SWx...

Data Sheet Parameter VOLTAGE MONITOR COMPARATOR VM2 Input Threshold VM2 Input Hysteresis VM2 Leakage Current POR TIMER TIMER Pin Pull-Up Current WATCHDOG Reset Threshold Voltage Reset Threshold Hysteresis Reset Timeout Period Watchdog Timeout Period Option 1 Option 2 Option 3 Option 4 WDI Pulse Width WDI Input High Voltage WDI Input Low Voltage RSTO Output Low Voltage RSTO Leakage Current Test Conditions/Comments VM2 pin Falling threshold TIMER pin 3 WDI and RSTO pins Senses VFB2 tRP tWD THERMAL Thermal Shutdown Threshold Thermal Shutdown Hysteresis

Data Sheet ABSOLUTE MAXIMUM RATINGS PGNDx toGND Operating Temperature Range Storage Temperature Range Soldering Conditions Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE 6JA is specified for the worst-case conditions, that is, a device soldered...

Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NOTES 1. SOLDER THE EXPOSED PAD TO AN EXTERNAL GND PLANE. Table 4. Pin Function Descriptions Pin No. 1 2 Description Analog Ground. Connect this pin to the ground plane. Internal 5 V Regulator Output. The IC control circuits are powered from this voltage. Place a 1 µF ceramic capacitor between VREG and GND. POR Sequence Selection and Delay Time Setting. This pin is used to set the POR sequence and delay time (see the TIMER Pin Configuration section). Power Fail Comparator Input. Connect an external resistor divider from PVIN2 to PFI to monitor...

Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VIN = 12 V, VOUT = 3.3 V, L = 22 µH, COUT = 47 µF/X7R/6.3 V, fSW = 300 kHz, unless otherwise noted. 95 VOUT = 1V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V VOUT = 5V Figure 8. Efficiency vs. Output Current at VIN = 5 V Figure 5. Efficiency vs. Output Current at VIN = 12 V VOUT = 1V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V Figure 6. Shutdown Current vs. VIN Figure 9. Quiescent Current vs. VIN Figure 7. UVLO Threshold vs. Temperature Figure 10. Enable Threshold vs. Temperature