The ADP2165/ADP2166 are high-efficiency, current mode control, step-down DC-to-DC regulators. They feature an integrated high-side FET and a synchronous rectified FET, offering a compact solution with high power density. The devices support robust sequencing with precision enable, power-good monitor, and output voltage tracking. The switching frequency is programmable or can be synchronized to an external clock to minimize EMI.
Efficiency graphs demonstrate performance across different output currents and input voltages, highlighting the device's efficiency under various conditions.
The ADP2165/ADP2166 are step-down, DC-to-DC regulators designed for high-performance applications requiring high efficiency and design simplicity. They operate with an input voltage range of 2.7 V to 5.5 V and can regulate output voltages down to 0.6 V. Key features include programmable switching frequency, soft start, external compensation, and enable and power-good pins. Preset output voltage options are available for 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, and 1.0 V.
The regulators use a fixed frequency, current mode PWM control architecture for optimal line and load transient performance. The PWM mode adjusts the duty cycle of the integrated MOSFET to regulate the output voltage with low ripple.
The EN input pin has a precision analog threshold of 1.2 V with 100 mV hysteresis. The regulator turns on when the enable voltage exceeds 1.2 V and turns off when it falls below 1.1 V. An internal pull-down resistor prevents accidental enable if the EN pin is not externally connected.
The internal regulator provides a stable supply for control circuits and includes a current-limit circuit for protection. A 1 µF ceramic capacitor is recommended between the VREG and GND pins.
The integrated boot regulator provides gate drive voltage for the high-side NFET. A 0.1 µF ceramic capacitor between the BST and SW pins is recommended.
The switching frequency is set by a resistor between the RT and GND pins. The frequency can be synchronized with an external clock ranging from 250 kHz to 1.4 MHz.
The soft start time is programmable via a capacitor between the SS and GND pins. The soft start prevents reverse inductor current during startup.
The TRK feature allows the output voltage to track another voltage, useful for core and I/O voltage tracking in FPGAs, DSPs, and ASICs.
The PGOOD pin indicates whether the output voltage is within ±10% of the desired value, with a 16-cycle delay for assertion and deassertion.
The regulators include peak current-limit, short-circuit, overvoltage, undervoltage lockout, and thermal shutdown protections to ensure safe operation under various conditions.
The ADP2165/ADP2166 are supported by the ADIsimPower design tool, which helps generate optimized power designs. Input and output capacitor selection guidelines are provided to minimize voltage ripple and ensure stability.
The inductor value is influenced by operating frequency, input voltage, output voltage, and inductor ripple current. A smaller inductor results in faster transient response but lower efficiency due to higher ripple current, while a larger inductor improves efficiency but slows transient response. The ripple current is typically set to one-third of the maximum load current. The inductor value is calculated using the formula: L = (VIN - VOUT) / (fSW × ΔIL × D), where D is the duty cycle. For duty cycles over 50%, a minimum inductor value is required to prevent subharmonic oscillations. The peak inductor current should not exceed the inductor's saturation current.
The output capacitor affects ripple voltage, load step transient, and loop stability. It supplies the load during transient events until the control loop adjusts the inductor current. The required capacitance for undershoot and overshoot is calculated using specific formulas. The largest capacitance from these calculations should be selected to meet performance requirements. The capacitor's voltage rating must exceed the output voltage, and its RMS current rating must be sufficient.
Compensation involves selecting components to stabilize the control loop. The power stage is modeled as a voltage-controlled current source. The compensation components (RC, CC, and optional CCP) are selected based on the desired cross frequency and the characteristics of the output capacitor. The design guidelines provide equations for calculating these components.
A design example is provided with specific parameters: input voltage of 5V, output voltage of 1.2V, output current of 6A, and a switching frequency of 1.2 MHz. The example includes calculations for inductor and capacitor selection, compensation components, and soft start time. Recommended components are listed for achieving the desired performance.
Good PCB layout is crucial for optimal performance. Separate analog and power ground planes should be used, with components placed close to the IC and short traces for high current paths. The feedback resistor network should be close to the FB pin to minimize noise pickup. A large copper plane should be used for thermal dissipation.
The document provides detailed reference designs for the ADP2165/ADP2166 step-down regulators. These include configurations for different output voltages and synchronization options, such as 1.2 V, 1.8 V, and 3.3 V outputs with varying synchronization frequencies and tracking modes.
Key components include inductors (L1), input capacitors (CIN), output capacitors (COUT), and various resistors and capacitors for feedback and compensation networks. Specific values are provided for each configuration, such as L1 values ranging from 0.47µH to 0.82µH and COUT values from 100µF to 470µF.
The ADP2165/ADP2166 is housed in a 24-lead Lead Frame Chip Scale Package (LFCSP_WQ) with dimensions of 4 mm x 4 mm. The document includes detailed measurements and compliance with JEDEC standards.
The guide lists various models of the ADP2165 and ADP2166, specifying output currents (5A or 6A), temperature ranges (-40°C to +125°C), and output voltages (ranging from adjustable to fixed values like 1.0V, 1.2V, 1.5V, etc.). Evaluation boards are also available for both models.
TYPICAL APPLICATION CIRCUIT Continuous output current ADP2165: 5 A ADP2166: 6 A Integrated MOSFET High-side on resistance: 19 mΩ Low-side on resistance: 15 mΩ Reference voltage: 0.6 V ± 1% over temperature range Input voltage range: 2.7 V to 5.5 V Current mode architecture Switching frequency Fixed frequency: 620 kHz or 1.2 MHz Adjustable frequency: 250 kHz to 1.4 MHz Synchronizes to external clock: 250 kHz to 1.4 MHz Selectable synchronize phase shift: in phase or out of phase External compensation Programmable soft start Startup into a precharged output Voltage tracking input Power-good output and precision enable input Accurate current limit Available in 24-lead, 4 mm × 4 mm LFCSP_WQ package Supported by ADIsimPower™ design tool APPLICATIONS Point of load regulation Communications and networking High end consumer Industrial, instrumentation, and healthcare The ADP2165/ADP2166 are designed to be extremely flexible with the addition of a minimal amount of external components to program soft start and control loop compensation. The ADP2165/ADP2166 are supplied from an input voltage of 2.7 V to 5.5 V. Output voltage options include 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, or 1.0 V fixed outputs and adjustable options capable of supporting an output voltage range from 0.6 V to 90% of the input voltage. Protection features include undervoltage lockout (UVLO), overvoltage protection (OVP), overcurrent protection (OCP), and thermal shutdown (TSD) for robust performance. The ADP2165/ADP2166 operate over the −40°C to +125°C junction temperature range and are available in a 24-lead LFCSP_WQ package. GENERAL DESCRIPTION Key features include precision enable, power-good monitor, and output voltage tracking to facilitate robust sequencing. The switching frequency can be programmed from 250 kHz to 1.4 MHz, or it can be fixed at 620 kHz or 1.2 MHz. The synchronization function allows the switching frequency to synchronize to an external clock, minimizing the electromagnetic interference (EMI) of the system. VPVIN = 3.3V 95 90 VPVIN = 5V 85 EFFICIENCY (%) The ADP2165/ADP2166 are high efficiency, current mode control, step-down dc-to-dc regulators with an integrated 19 mΩ high-side FET and a 15 mΩ synchronous rectified FET. The ADP2165/ADP2166 combine a small size, 4 mm × 4 mm LFCSP package with an accurate current limit, resulting in a smaller inductor size and a high power density, point of load solution. Data Sheet 5.5 V, 5 A/6 A, High Efficiency, Step-Down DC-to-DC Regulators with Output Tracking ADP2165/ADP2166 Figure 2. Efficiency vs. Output Current Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com
Open the catalog to page 1Data Sheet REVISION HISTORY 8/14—Revision 0: Initial Version
Open the catalog to page 2Data Sheet FUNCTIONAL BLOCK DIAGRAM EN SLOPE RAMP HICCUP MODE VPVIN CONTROL LOGIC PGOOD AVIN SLOPE RAMP Figure 3. ADP2165/ADP2166 Functional Block Diagram
Open the catalog to page 3Data Sheet SPECIFICATIONS VPVIN = VAVIN = 5 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted. Table 1. Parameter PVIN AND AVIN VPVIN Voltage Range VAVIN Voltage Range Quiescent Current Shutdown Current VAVIN Undervoltage Lockout Threshold FB FB Regulation Voltage Fixed Output Version FB Bias Current ERROR AMPLIFIER (EA) Transconductance EA Source Current EA Sink Current INTERNAL REGULATOR (VREG) VREG Voltage Dropout Voltage Regulator Current Limit SW High-Side On Resistance 1 Symbol VPVIN VAVIN IQ ISHDN UVLO No switching,...
Open the catalog to page 4' Pin-to-pin measurement.
Open the catalog to page 5Data Sheet ABSOLUTE MAXIMUM RATINGS SS, COMRTRK, VREG, SYNC, RT Operating Junction Temperature Range Storage Temperature Range Soldering Conditions Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE 6JA is specified for the worst-case...
Open the catalog to page 6Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NOTES 1. EXPOSED PAD. SOLDER THE EXPOSED PAD TO AN EXTERNAL GROUND PLANE UNDERNEATH THE IC FOR THERMAL DISSIPATION. Table 4. Pin Function Descriptions Pin No. 1 Mnemonic SYNC SS COMP FB GND PGOOD BST PGND Description Synchronization Input. Connect this pin to an external clock between 250 kHz and 1.4 MHz to synchronize the switching frequency to the external clock. RT can be used to program the phase shift when synchronizing the external clock. Frequency Setting. Connect a resistor between the RT and GND pins to program the switching frequency...
Open the catalog to page 7Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VPVIN = VAVIN = 5 V, VOUT = 1.2 V, L = 1 µH, CIN = 47 µF, COUT = 100 µF, fSW = 600 kHz, unless otherwise noted. 100 Figure 5. Efficiency (fSW = 600 kHz, VPVIN = 3.3 V) vs. Output Current INDUCTOR: WÜRTH ELEKTRONIK 744311100 INDUCTOR: WÜRTH ELEKTRONIK 744311100 Figure 8. Efficiency (fSW = 600 kHz, VPVIN = 5 V) vs. Output Current 55 INDUCTOR: WÜRTH ELEKTRONIK 744314047 INDUCTOR: WÜRTH ELEKTRONIK 744314047 0 Figure 6. Efficiency (fSW = 1.2 MHz, VPVIN = 3.3 V) vs. Output Current Figure 9. Efficiency (fSW = 1.2 MHz, VPVIN = 5 V) vs. Output...
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