REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD8322 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 5 V CATV Line Driver Coarse Step Output Power Control FUNCTIONAL BLOCK DIAGRAM DECODE SHIFT REGISTER DATA LATCH AD8322 VIN+ VIN– VOUT+ VOUT– BUFFER R1 R2 ATTENUATION CORE 8 8 8 POWER-DOWN LOGIC POWER AMP DATEN DATA CLK GND (12 PINS) PD ZIN (SINGLE) = 210 ZIN (DIFF) = 235 ZOUT DIFF = 75 VCC (7 PINS) DIFF OR SINGLE INPUT AMP FEATURES Supports DOCSIS Standard for Reverse Path Transmission Gain Programmable in 6 dB Steps Over a 42 dB Range Low Distortion at 60 dBmV Output –58 dBc SFDR at 21 MHz –56 dBc SFDR at 42 MHz Output Noise Level –46 dBmV in 160 kHz Bandwidth Maintains 75 Output Impedance Power-Up and Power-Down Condition 180 MHz Bandwidth 5 V Supply Operation Supports SPI Interfaces APPLICATIONS Gain Programmable Line Driver DOCSIS-Compliant Data Modems Interactive Set-Top Boxes PC Plug-in Modems General-Purpose Digitally Controlled Variable Gain Block GENERAL DESCRIPTION The AD8322 is a low-cost, digitally controlled variable gain amplifier optimized for coaxial line driving applications such as cable modems that are designed to the MCNS-DOCSIS upstream standard. An 8-bit serial word determines the desired output gain over a 42.14 dB range, with gain steps of 6.02 dB/major carry. The AD8322 comprises a digitally controlled variable attenuator of 0 dB to –42.14 dB, which is preceded by a low-noise, fixed-gain buffer and is followed by a low-distortion, high-power amplifier. The AD8322 accepts a differential or single-ended input signal. The output is specified for driving a 75 Ù load, such as coaxial cable. Distortion performance of –58 dBc is achieved with an output level up to 60 dBmV at 21 MHz bandwidth. A key performance and cost advantage of the AD8322 results from the ability to maintain a constant 75 Ù output impedance during power-up and powerdown conditions. This eliminates the need for external 75 Ù termination resulting in twice the effective output voltage when compared to a standard operational amplifier. The AD8322 is packaged in a low-cost 28-lead TSSOP, operates from a single 5 V supply, and has an operational temperature range of –40°C to +85°C. GAIN CODE – Decimal 1 –55 DISTORTION – dBc –60 –65 –70 –75 2 4 8 16 32 64 128 fO = 42MHz VO = 60dBmV @ MAX GAIN HD3 HD2 Figure 1. Harmonic Distortion vs. Gain Control

–2– REV. 0 AD8322–SPECIFICATIONS (TA = 25C, VS = 5 V, RL = RIN = 75 , VIN = 92 mV p-p differential, VOUT measured through a 1:1 transformer1 with insertion loss of 0.5 dB @ 10 MHz unless otherwise noted) Parameter Conditions Min Typ Max Unit INPUT CHARACTERISTICS Specified AC Voltage POUT = 60 dBmV, Max Gain 92 mV p-p Noise Figure Max Gain, f = 10 MHz 11.8 dB Input Resistance Single-Ended Input 210 Ù Differential Input 235 Ù Input Capacitance 2 pF GAIN CONTROL INTERFACE Gain Range 41.0 42.14 43.2 dB Maximum Gain Gain Code = 1xxxxxxx 27.5 29.5 31.5 dB Minimum Gain Gain Code = 00000001 –14.64 –12.64...

REV. 0 AD8322 –3– LOGIC INPUTS (TTL/CMOS Compatible Logic) Parameter Min Typ Max Unit Logic “1” Voltage 2.1 5.0 V Logic “0” Voltage 0 0.8 V Logic “1” Current (VINH = 5 V) CLK, SDATA, DATEN 0 20 nA Logic “0” Current (VINL = 0 V) CLK, SDATA, DATEN –600 –100 nA Logic “1” Current (VINH = 5 V) PD 50 190 ìA Logic “0” Current (VINL = 0 V) PD –250 –30 ìA TIMING REQUIREMENTS Parameter Min Typ Max Unit Clock Pulsewidth (TWH) 16.0 ns Clock Period (TC) 32.0 ns Setup Time SDATA vs. Clock (TDS) 5.0 ns Setup Time DATEN vs. Clock (TES) 15.0 ns Hold Time SDATA vs. Clock (TDH) 5.0 ns Hold Time DATEN vs. Clock...

REV. 0 AD8322 –4– ORDERING GUIDE Model Temperature Range Package Description JA Package Option AD8322ARU –40°C to +85°C 28-Lead TSSOP 67.7°C/W* RU-28 AD8322ARU-REEL –40°C to +85°C 28-Lead TSSOP 67.7°C/W* RU-28 AD8322-EVAL Evaluation Board *Thermal Resistance measured on SEMI standard 4-layer board. ABSOLUTE MAXIMUM RATINGS* Supply Voltage +VS Pins 6, 8, 9, 20, 21, 23, 27 . . . . . . . . . . . . . . . . . . . . . . . 6 V Input Voltages Pins 25, 26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.5 V Pins 1, 2, 3, 7 . . . . . . . . . . . . . . . . . . . . . . . –0.8 V to +5.5...

REV. 0 AD8322 –6– FREQUENCY – MHz 0 1 1k FEEDTHROUGH – dBc 10 100 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 MAX GAIN MIN GAIN GAIN CODE 0 PD = 0 TPC 6. Input Signal Feedthrough vs. Frequency FUNDAMENTAL FREQUENCY – MHz –45 5 65 DISTORTION – dBc –50 –55 –60 –65 15 25 35 45 55 PO = 58dBmV at MAX GAIN PO = 62dBmV at MAX GAIN PO = 60dBmV at MAX GAIN TPC 7. Second Order Harmonic Distortion vs. Frequency for Various Output Levels FUNDAMENTAL FREQUENCY – MHz –45 5 65 DISTORTION – dBc –50 –60 –70 –75 15 25 35 45 55 –55 –65 PO = 62dBmV at MAX GAIN PO = 58dBmV at MAX GAIN PO = 60dBmV at MAX GAIN TPC 8....

REV. 0 AD8322 –7– APPLICATIONS General Application The AD8322 is primarily intended for use as the upstream power amplifier (PA) in DOCSIS (Data Over Cable Service Interface Specifications) certified cable modems and CATV set-top boxes. Upstream data is modulated in QPSK or QAM format. This is done with DSP or a dedicated QPSK/QAM modulator. The amplifier receives its input signal from the QPSK/QAM modulator or from a DAC. In either case the signal must be low-pass filtered before being applied to the amplifier. Because the distance from the cable modem to the central office will vary with each...