CMV50000
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CMV50000 47.5MP CMOS Machine Vision Image Sensor

Document Feedback Content Guide 7.7 Configuring the On-Chip Data Processing . 89 10 Package Drawings & Markings. 132

Document Feedback General Description The CMV50000 is a high speed CMOS image sensor with 7920 × 6004 effective pixels (47.5Mp) developed for machine vision and video applications. The image array consists of 4.6µm pipelined 8T global shutter pixels which allow exposure during read out, while performing true CDS (Correlated Double Sampling) operation. The image sensor also integrates a programmable analog gain amplifier and offset regulation. The image sensor has 22 digital sub-LVDS data output channels. Each output channel runs up to 830 Mbit/s, which results in a frame rate of 30 fps at...

Document Feedback Machine vision Video/Broadcast Security High-end inspection Aerial mapping Document scanning ITS Scientific 3D imaging Block Diagram The functional blocks of this device are shown below: Figure 2 : Functional Blocks of CMV50000 Pixel array 7920 x 6004 (effective) active pixels CTR_OUT channel OBR_OUT channel CLK_OUT channel Digital sequencer

Document Feedback 2 Ordering Information Ordering Code Package Chroma Options Delivery Quantity CMV50000-1E3M1PN PGA Mono windowless 10 Pcs / Tray

Document Feedback 3 Pin Assignment 3.1 Pin Diagram Figure 3 : Pin Numbering (bottom view) 3.2 Pin Description Figure 4: Pin Description of CMV50000

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Document Feedback CMV50000 Absolute Maximum Ratings Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under “Operating Conditions” is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 5: Absolute Maximum Ratings of CMV50000 Symbol Electrical Parameters ISCR Input Current (latch-up immunity) Electrostatic Discharge ESDHBM...

Document Feedback 5 Electrical Characteristics All limits are guaranteed. The parameters with Min and Max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. Figure 6: Electrical Characteristics of CMV50000 Symbol Parameter Power Supplies Logic Supply Voltage of digital core, PLL Logic Supply Voltage of ADC I/O Supply Voltage for sub-LVDS, CMOS I/O's VDD27 Main Analog Supply Voltage; Supply Voltage for negative regulators VDDARRAY Pixel Array Supply Voltage VDD33 Internal Regulator Supply Voltage IDDARRAY Supply Current Ptot Total Power Consumption Idle...

Symbol Parameter Electrical Characteristics fSPI_CLK SPI input clock frequency tsetup SPI setup time thdd SPI hold time tREQ REQ_FRAME/EXP pulse width VCM Common mode voltage VOD Differential voltage swing DC Clock duty cycle AIOD IOD variation over Temp. (1) VDDARRAY draws high peak currents (>1 A) during GLOB. Enough decoupling is needed to suppress these peaks. (2) Unused sub-LVDS channels must be terminated the same way as the used channels.

Document Feedback CMV50000 Typical Operating Characteristics 6 Typical Operating Characteristics 6.1 Electro-Optical Characteristics Below are the typical electro-optical specifications of the CMV50000. These are typical values for the whole operating temperature range. Figure 7: Electro-Optical Characteristics of CMV50000 Parameter Value Optical format 35mm full frame Pixel type Global shutter with true CDS Shutter type Pipelined global shutter Full well charge 14500 e- Allows fixed pattern noise correction and reset (kTC) noise canceling by true correlated double sampling (true-CDS)....

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Document Feedback CMV50000 Typical Operating Characteristics 6.2 Spectral Characteristics Figure 8 : Quantum Efficiency

Typical Operating Characteristics Figure 11 : Responsivity (Analog Gain x4)

Typical Operating Characteristics Figure 13 : Angular Response

Document Feedback Functional Description Sensor Architecture Figure 2 shows a high-level representation of the chip architecture for the CMV50000 sensor. The drawing shows the active pixel array and the periphery around it that enables the control and readout of the pixels. The core of the image sensor is made up from the pixel array, which is driven from two sides by 2 instances of the row logic and drivers. The pixel control signals are created globally by the global drivers and distributed to the sides of the sensor. The pixel data is read out row by row using a data path consisting of...

Document Feedback Figure 14: Pixel Array Buffer Pixels Black Columns Black Columns Buffer Pixels Buffer Pixels Effective Pixels Buffer Pixels Effective OB 7920 (effective) 22 buffer pixels 98 OB pixels (68 eff. OB) 22 buffer pixels 98 OB pixels (68 eff. OB) 8160 The pixel array can be split up in 3 parts: Optical black (OB) pixels (left and right side), buffer pixels (around effective array perimeter) and effective pixels. Only the 68 effective OB pixels are used for internal row clamping, which improves row noise and allows setting a pre-defined black level. The buffer pixels form a guard...

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Document Feedback The 3 main internal clocks are CLK_ADC, CLK_SER and CLK_PIX: • CLK_ADC is the PLL output clock and is equal to the data rate (830MHz for 830Mbit/s). • CLK_SER is 1:2 of CLK_ADC and equal to the sub-LVDS output clock. • CLK_PIX is the pixel clock and has a ratio of 1:12 of CLK_ADC. 7.1.10 OTP Memory A non-volatile, one time programmable memory is included on-chip. This is programmed with unique device ID and temperature sensor calibration data which the user can use. This section explains how to connect and power the sensor, as well as basic recipes of how to configure the...

Document Feedback Figure 15: Power Supply Decoupling and Grounding Diagram single 100nF ceramic capacitor as close as possible to each physical pin VDD33 VDDARRAY VDDARRAY Analog ground VSSA VSSACP Digital ground (A/D Converters) Digital ground (Periphery) Biasing (on-chip regulators) Operating the pixel array requires multiple different biasing supply levels. These supply levels can be generated using on-chip regulators. The chip contains 2 types of regulators, for positive supply levels and negative supply levels. The regulator output voltages are controlled using the SPI interface. The...