ATS9352
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Catalog excerpts

ATS9352 - 1

2 channels sampled at 12-bit resolution 500 MS/s real-time sampling rate Variable frequency external clocking 256 Megasamples of on-board acquisition memory per channel Asynchronous DMA device driver ® • AlazarDSO oscilloscope software • • Software Development Kit supports ® ® C/C++, C#, Python, MATLAB , LabVIEW Support for Windows & Linux Operating System 32-bit/64-bit Windows & 64‑bit Linux AlazarTech ATS®9352 is 4-lane PCI Express Gen 2 (PCIe x4), dual-channel, high-speed, 12-bit, 500 MS/s waveform digitizer card capable of streaming acquired data to PC memory at rates up to 1.6 GB/s or storing it in its on-board dual-port acquisition memory buffer of 256 Megasamples. Applications Optical Coherence Tomography (OCT) Ultrasonic & Eddy Current NDT/NDE Radar/RF Signal Recording Terabyte Storage Oscilloscope Unlike other products on the market, ATS9352 does not use interleaved sampling. Each input has its own 12-bit, 500 MSPS ADC chip. High-Resolution Oscilloscope The variable frequency external clock allows operation from 500 MHz down to 30 MHz, making ATS9352 an ideal waveform digitizer for OCT applications. Multi-Channel Transient Recording Lidar Spectroscopy Users can capture data from one trigger or a burst of triggers. Users can also stream very large datasets continuously to PC memory or hard disk. ATS9352 is supplied with AlazarDSO software that lets the user get started immediately without having to go through a software development process. Users who need to integrate the ATS9352 in their own program can purchase a software development kit, ATS‑SDK, for C/C++, C#, Python, MATLAB, and LabVIEW for both Windows and Linux operating systems. All of this advanced functionality is packaged in a low-power, half-length PCI Express card.

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ATS9352 - 2

500 MS/s 12-Bit PCI Express Digitizer PCI Express Bus Interface Acquisition System According to PCIe specification, a 4-lane board can be plugged into any 4-lane, 8-lane or 16-lane slot, but not into a 1-lane slot. As such, ATS9352 requires at least one free 4-lane, 8-lane, or 16-lane slot on the motherboard. The two channels are guaranteed to be simultaneous, as the two ADCs use a common clock. ATS9352 interfaces to the host computer using a 4-lane PCI Express bus. Each lane operates at 5 Gbps (Gen 2). ATS9352 PCI Express digitizers use state of the art 500 MSPS, 12-bit ADCs to digitize...

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500 MS/s 12-Bit PCI Express Digitizer Recommended Motherboards or PCs Many different types of motherboards and PCs have been benchmarked by AlazarTech. The ones that have produced the best throughput results are listed here: www.alazartech.com/images-media/2246-AlazarTech RecommendedMotherboards.pdf. Optional FPGA-Based FFT Processing ATS9352 On-FPGA FFT option provides the ability to do real-time FFT signal processing using the ATS9352 on-board FPGA*. Note that only one input can be processed. TRIGGER INPUT(S) CAPTURE Data is returned to the user in buffers, where each buffer can contain...

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500 MS/s 12-Bit PCI Express Digitizer It is important to note that triggering is disabled in this mode. START CAPTURE INPUT(S) CAPTURE The various AutoDMA schemes discussed above provide hardware support for optimal data transfer. However, a corresponding high-performance software mechanism is also required to make sure sustained data transfer can be achieved. This proprietary software mechanism is called Async DMA (short for Asynchronous DMA). A BUFFER_OVERFLOW flag is asserted only if the entire on-board memory is used up. A number of data buffers are posted by the application software....

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500 MS/s 12-Bit PCI Express Digitizer Timebase ATS9352 timebase can be controlled either by onboard low-jitter VCO or by External Clock. On-board low-jitter VCO uses an on-board 10 MHz TCXO as a reference clock. External Clock While the ATS9352 features low-jitter VCO and a 10 MHz TCXO as the source of the timebase system, there may be occasions when digitizing has to be synchronized to an external clock source. ATS9352 External Clock feature provides an SMA input for an external clock signal, which should have a high slew rate. Signal levels, specified in detail on page 8, must be...

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ATS9352 - 6

500 MS/s 12-Bit PCI Express Digitizer Software Development Kits AlazarTech provides an easy-to-use software development kit for customers who want to integrate the ATS9352 into their own software. A Windows and Linux compatible software development kit, called ATS‑SDK, includes headers, libraries and source code sample programs written in C/C++, C#, Python, MATLAB, and LabVIEW. These programs can fully control the ATS9352 and acquire data in user buffers. The purchase of an ATS-SDK license includes a subscription that allows users to download ATS-SDK updates from the AlazarTech website for...

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500 MS/s 12-Bit PCI Express Digitizer Technical Support RoHS Compliance AlazarTech digitizers come with a standard one (1) year parts and labor warranty. This warranty can be extended for a fee (more information can be found in the Extended Warranty section below). All manufacturing is done using RoHS-compliant components and lead-free soldering. AlazarTech is known for its world-class technical support. Customers receive free technical support on hardware products that are under warranty. If your waveform digitizer is out of warranty, you will not be eligible for free technical support on...

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500 MS/s 12-Bit PCI Express Digitizer System Requirements Acquisition Memory System Personal computer with at least one free x4, x8, or x16 PCI Express (v2.0) slot, 8 GB RAM, 16 GB of free hard disk space. Acquisition Memory/ch 256 Million samples per channel Record length Software-selectable with 32-point resolution. Record length must be a minimum of 256 points. There is no upper limit on the maximum record length. Software-selectable from a minimum of 1 to a maximum of infinite number of records Pre-trigger depth From 0 to 4080 for single channel From 0 to 2040 for dual channel...

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500 MS/s 12-Bit PCI Express Digitizer Triggering System Mode Edge triggering with hysteresis Comparator type Digital comparators for internal (CH A, CH B) triggering and software-selectable analog comparators or TTL gate for TRIG IN (External) triggering Number of trigger engines 2 Trigger engine combination Engine J, engine K, J OR K, software-selectable Trigger engine source CH A, CH B, TRIG IN, Software or None, independently softwareselectable for each of the two Trigger Engines ±5% of full scale input, typical Trigger sensitivity ±10% of full scale input range, except for TTL...

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