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U4431A Protocol Analyzer for MIPI? M-PHY Interfaces

U4431A Protocol Analyzer for MIPI? M-PHY Interfaces
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U4431A Protocol Analyzer for MIPI? M-PHY Interfaces - 1

U4431A Protocol Analyzer for MIPI™ M-PHY Interfaces Ind u s tr i e s a nd A p p l i cat i o ns • High-resolution cameras • High-speed peripherals • Advanced graphics adapters • Massive memory buffers De s i g n e r s a nd Val i d at o r s o f • M-PHY • IP • Application processors • Memory/chipsets • Mobile devices Challenge the Boundaries of Test Agilent Modular Products • Mobile embedded systems Pr o d u c t D e s cr i p t i o n Deep insight to help you win the race to M-PHY The MIPI™ M-PHY standards are the backbone of next-generation mobile computing designs. Because these designs are replacing desktop PCs in many applications, these architectures are much faster and more complex than in the past. The increasing demand for bandwidth has driven the expansion of the M-PHY specification to include four-lane, 6.0-Gbs options. The U4431A offers up to 16 GB of analysis memory on each lane, allowing designers to capture tens of seconds of system traffic, even at these high speeds. In addition, the Agilent U4431A offers “Raw Mode,” a feature that lets designers see the time-correlated 8b/10b data that underlies each protocol. These states can be displayed as a waveform or listing, providing insight into how a packet is formed at the physical layer. M ain F eatures and Benefits Power to meet the needs of today’s and tomorrow’s designs • Up to gear 3 HS data rates • Up to 16 GB trace depth • Up to 4 data lanes Complete insight into complex designs • Track multiple M-PHY busses from the PHY to the application layer • Raw Mode 8b/10b data views • Infiniium Oscilloscope integration • Powerful interface that allows unlimited customization of system views Powerful triggers • N-way if/then/else trigger branching with AND/OR logic • Over 50 triggering macros • PHY and protocol error triggers • Event counters, flags, and timers Flexible probing

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U4431A Protocol Analyzer for MIPI? M-PHY Interfaces - 2

Chassis and Probing Configuration Chassis options Lane options Speed options Select memory Select protocols Clocking architecture Analysis direction Lane remapping Lane polarity Multiple blade support Performance HS Modes supported PWM Modes supported Rate Series supported (HS and PWM) Symbol lock time (subject to protocol spec limit) Fast (HS-G1) Slow (HS-G2, HS-G3) Auto speed detection and tracking Memory Standard Option M04 Option M16 5-slots USB 2.0 host connection for either chassis Lower-speed alternative to PC control options, not recommended for > 1 GB memory Embedded PC module (no...

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