LE77D112 PRODUCT PROFILE - Zarlink Semiconductor - #19

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3.3 V 2 C 3.3 V 3 1 C C 3.3 V 1 1 2 2 1 2 RS INT TSCAPCLKFSDXADRA MCLKDOUTDINCSLDCLK VCCD VCCA VCCA AGND AGND DGND DGND REF R IREF i VS i i i i i i i i i i F VB VOUT VIN VDC C1 C3 VREFCHCLKC2 OUTi R NPRi HPi VSi C C (optional) R IMTi DCi R R i i i i i i i i i i i C1 C2 C3 F IMT VHP RDC VOUT CFILT 19 *CHCLK*VREF VIN NPRFILT i LPFi C i BGND +– +– U1Le77D11U2Le78D11 Zarlink Semiconductor Inc. i Le77D11Data Sheet AGND* i i i (TIP)VA (RING) IMT i i VCC*B HSi A FSET* VSW* LPF ILS SD VREG CHS C 3.3 V MPIInterfacePCMInterface BDi C BDi R RAMP 4 VREGi R C C DD2 SA2i SB2i SWi R R Q * LIMi SW R V SWi L SW SWi V D DD1 FL2 U3 C SW SA1i SB1i 12 C R R K2K2K1K1G NCAA FL1 C 12 345678 SW1 1i 2i ESRi C C VREGi L PTC PTC Place closeto VSW pin To base ofQSW on other channel i VREG1 i C TIP RING is located close to gate on U3. ESRi SINGLE CHANNEL APPLICATION CIRCUIT Note: * Denotes pins that are common to both channels.i = per channel component.Protection is voltage tracking device. C

pageCatalog pdf di En 2012-06-22-01