| Notes: 1. Unless otherwise noted, the test conditions are set up by the Le5711 device test circuit as illustrated in Figure 7, on page 14. 2. a. Overload level is defined as THD = 1%. b. Overload level is defined when THD = 1.5%. 3. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 4. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 5. Group delay can be greatly reduced by using a ZT network such as that shown in Figure 5. The network reduces the group delay to less than 2 and increases 2WRL. The effect of group delay on linecard performance also may be compensated by synthesizing complex impedance with the QLSLAC™ device. 6. Minimum current level guaranteed not to cause a false loop detect. SLIC Device Decoding (For i, Channel = 1 or 2) |