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Extended Spartan-3A Family Overview - Xilinx


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KXILINX
Extended Spartan-3A Family Overview
DS706 (v1.0) July 31, 2008
Product Specification
General Description
The Extended Spartan®-3A family of Field-Programmable Gate Arrays (FPGAs) solves the design challenges in many high-volume, cost-sensitive electronic applications. With 12 devices ranging from 50,000 to 3.4 million system gates (as shown in Table 1), the Extended Spartan-3A family provides a broad range of densities and package options, integrated DSP MACs, and the lowest total system cost while increasing functionality. It also includes the non-volatile Spartan-3AN devices, which combine leading-edge FPGA and Flash technologies to provide a new evolution in security, protection and functionality, ideal for space-critical or secure applications.
The Extended Spartan-3A family improves system performance and reduces the cost of configuration. These enhancements, combined with proven 90 nm process technology, deliver more functionality and bandwidth per dollar than ever before, setting the new standard in the programmable logic industry. Because of its exceptionally low cost, the Extended Spartan-3A family is ideally suited to a wide range of consumer electronics applications, including broadband access, home networking, display/projection, and digital television equipment.
The Extended Spartan-3A family is a superior alternative to mask-programmed ASICs. FPGAs avoid the high initial cost, lengthy development cycles, the inherent inflexibility of conventional ASICs, and permit field design upgrades.
Summary of Extended Spartan-3A Family
• Very low-cost, high-performance logic solution for high-volume, cost-conscious applications
• Low-cost QFP and BGA packaging, Pb-free options
• Flexible power management
• Leading connectivity platform
• Abundant, flexible logic resources
• Dedicated resources for high-speed digital signal processing applications
• Precise clock management with up to eight Digital Clock Managers (DCMs)
• Integrated Flash memory in Spartan-3AN platform
Features
• Eight low-skew global clock networks, eight additional clocks per half device, plus abundant low-skew routing
• Hierarchical SelectRAM™ memory architecture
• Configuration interface to industry-standard PROMs
• Complete Xilinx® ISE® and free WebPACK™ development system software support
• MicroBlaze™ and PicoBlaze™ embedded processors reduce risk
• Low-cost starter kits from Xilinx, distributors, and third parties
• XA versions available for Automotive applications
Table I: Summary of Extended Spartan-3A Family Attributes
Device
System Gates
Equivalent Logic Cells
CLBs
Slices
Distributed RAM bits(1)
Block RAM bits(1)
In-System Flash bits(2)
Dedicated Multipliers
DSP48As
DCMs
Maximum User I/O
XC3S50A/AN
50K
1,584
176
704
11K
54K
1M
3
-
2
144(3)
XC3S200A/AN
200K
4,032
448
1,792
28K
288K
4M
16
-
4
248(4)
XC3S400A/AN
400K
8,064
896
3,584
56K
360K
4M
20
-
4
311
XC3S700A/AN
700K
13,248
1,472
5,888
92K
360K
8M
20
-
8
372
XC3S1400A/AN
1400K
25,344
2,816
11,264
176K
576K
16M
32
-
8
502
XC3SD1800A
1800K
37,440
4,160
16,440
260K
1,512K
-
-
84
8
519
XC3SD3400A
3400K
53,712
5,968
23,872
373K
2,268K
-
-
126
8
469
Notes:
1. By convention, one Kb is equivalent to 1,024 bits.
2. In-System Flash is available in the Spartan-3AN platform only.
3. Maximum user I/O for XC3S50AN is 108.
4. Maximum user I/O for XC3S200AN is 195.
© 2008 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCI Express, PCIe, and PCI-X are trademarks of PCI-SIG. All other trademarks are the property of their respective owners.
DS706 (v1.0) July 31, 2008 Product Specification
www.xilinx.com

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