TetraMAX ATPG - Synopsys - #4

SDF, Parasitics

SDC, Exceptions

Primel ime

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TetraMAX Slack-Driven ATPG

Transition and Small Delay Defect Patterns

Reports, Histograms

For very large designs, the TetraMAX TenX option enables ATPG and fault simulation to be run across multiple processors. The TenX distributed processing architecture is highly scalable to over 10 processors, and compared to a single processor can generate test vectors in less than 1/10th time but with the same high test coverage and minimal vector counts. The TenX option supports networks with heterogeneous platforms and popular compute management applications such as LSF

In addition to identifying defective parts from manufacturing, TetraMAX ATPG can also isolate the location of defects on devices that fail TetraMAX test vectors. Automatic and accurate defect isolation is an important step to diagnose critical yield issues, both during production ramp as well as in volume manufacturing. TetraMAX diagnostics read the test vectors and tester failure data, which are the differences between mea­sured and expected responses to those test vectors, and report the fault candidate locations that most likely explain the faulty de­vice behavior observed on the tester. TetraMAX diagnostics use advanced heuristics and a high performance fault simulator for rapid and reliable results in a volume manufacturing environment.

TetraMAX supports popular industry standards for netlist and test vector formats:

Circuit netlist: Verilog, VHDL (87 and 93) Library: Verilog functional (Structural and UDPs)

Testbench: Verilog (serial and parallel), VHDL-93 (serial only)

Test vectors: STIL, WGL, Toshiba TSTL2,

Texas Instruments TDL91, Fujitsu FTDL, and Verilog VCDE (input only)

Synopsys, Inc. 700 East Middlefield Road Mountain View, CA 94043

www.synopsys.com

© 2008 Synopsys, Inc. Synopsys, the Synopsys logo, PrimeTime, TetraMAX and VCS are registered trademarks of Synopsys, Inc. Printed in U.S.A. 04/08.CE.08-16349