Text version of the page

Datasheet

Synopsys PrimeTime PX - 33951 Synopsys PrimeTime PX

Expanding the PrimeTime Solution with Power Analysis

Overview Design closure in today’s advanced designs requires a delicate balance of many complex issues. Timing remains critical, but power has become increasingly important as well. Today, with soaring gate counts and increasing design complexities, power management is a mainstream design challenge and a key concern for chip designers. Power consumption is a critical design delimiter. It affects packaging decisions, form-factors, cooling requirements, battery life, design performance, and chip reliability. More than ever, accurate power analysis is critical to avoiding chip failure and achieving design success. The Synopsys PrimeTime
PrimeTime PX Power Analysis Synopsys PrimeTime PX, the power analysis extension to the PrimeTime solution, enables full-chip timing, signal integrity and power analysis in a single, easy-to-use environment. Built on the industry’s de-facto golden timing standard, PrimeTime PX delivers highly accurate dynamic and leakage power analysis in a shared environment with timing and signal integrity analysis, improving time-to-results (TTR) and productivity over separate, standalone timing and power analysis tools.By combining timing, signal integrity and power analysis into a single tool and environment, identical operations are not repeated. For example, timing and slew calculations are not repeated. Netlist, parasitic and constraint file reads are not repeated, and tool setup steps are not repeated. As a result, the PrimeTime PX tool delivers up to two times (2x) faster TTR over ® PX solution extends the trusted PrimeTime solution to accurately and quickly analyze power consumption in a design.
The Challenge separate, standalone solutions. Furthermore, as an integral part of the PrimeTime environment, power analysis can be performed using the same PrimeTime commands, reports, attributes and multiple debugging features. Power, timing, and signal integrity (SI) effects are all interde- pendent at 90 nanometers (nm) and below. To achieve the highest accuracy power analysis, an accurate timing engine is required to perform accurate timing and slew calculations. Prior solutions that included separate, standalone timing, signal integrity, and power analysis tools failed to take advantage of the interdependencies between timing, signal integrity and power. Furthermore, these solutions are not integrated, leading to cumbersome, non-convergent flows that do not achieve design closure.

PrimeTime

STA and Delay Calculation PrimeTime SI

Crosstalk delay and noise analysis

PrimeTime PX

Gate-level power analysis

PrimeTime VX

Variation-aware STA

CCS

Unified timing, SI, power and variation models
Figure 1: PrimeTime Suite