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SR430 SpecificationsSignal Input DISCNIM level into 50 Max. count rate100 MHz Max. count32,767 per bin per trigger Records/accumulation1 to 64k (or free run) Max. accumulation32,767 per bin in Add mode,±16,383 per bin in Toggle or External modeAdd/subtractRecords may be added or toggled (add/subtract on alternating triggers). External subtract input may also control the toggle. Minimum trigger timeTp = (# of bins × bin width) + (# of bins Ω . Low wheneversignal input exceeds discriminator level with the correct slope.SYNC/BUSYTTLlevel. Rising edge is synchronous with first time bin of each record. Remains high until re-armed for next trigger. BIN CLK NIM level into 50 × 250 ns) + 150 µ sSYNC/BUSYoutput is high for Tp after each trigger. When SYNC/BUSY returns low, the next record may be triggered. Triggers received while SYNC/BUSYis high are ignored. BandwidthDC to 250 MHzInput impedance50 Outputs Trigger Rate Ω Ω . Each transitionis a bin boundary. Active only while a record is being acquired. Timing skew relative to DISC out is <2 ns.TOGGLETTLlevel. Indicates whether the next record will be added to or subtracted from the accumulation. (Internal toggle mode)TEST50 MHz NIM output into 50 Linear range±300 mV(at input)Input protection±5 VDC, 50 Vfor 1 Ω µ sOverload recovery5 ns for <10 Accuracy0.1 % + 10 mV Ω Impedance10 k Discriminator range − 300 mVto +300 mVResolution0.2 mV SlopePositive or negative Accuracy2 mV+ 1 %Min. pulse amplitude10 mVPulse-pair resolution10 ns (typ.) Discriminator output NIM level into 50 Ω µ s duration overload Ω . (There is a 20 ns insertion delay from the signal input to the discriminator output.) AUX1, AUX2(General purpose analog outputs)Full scale±10 V Resolution5 mV Output current 10 mA Output impedance<1 Bin width5 ns, 40 ns, 80 ns, 160 ns, 320 ns, 640 ns, 1.28 Threshold − 2.000 Vto +2.000 Vin 1 mVstepsSlopeRising or falling Protection15 VDC, 100 Vfor 1 µ s Inputs Trigger Input Discriminator µ s, 2.56 µ s,...10.486 ms(10 ns and 20 ns are not available)Accuracy1 ns + 20 ppm of bin widthJitter (rms)100 ps + 10 ppm of delay from SYNC/BUSYoutput (bins are synchronous with SYNC/BUSYoutput)Indeterminacy2.5 ns with respect to trigger input Insertion delay45 ns from trigger to first bin. Risingedge of SYNC/BUSYoutput occurs at beginning of first bin. Signal pulses arriving 25 ns after the trigger will be counted in the first bin. Internal Time Bins SIGNALAnalog 50 Ω inputTRIGGER10 k Externally Clocked Time Bins Bins per record1k to 16k in 1k increments (1024 to 32,704 including trigger offset) Ω inputBIN CLK INPUTTTLinput (Rising edge triggers nexttime bin)ACC. INHIBITTTLinput, sampled each trigger. If high, causes the current record to be ignored (not accumulated)SUBTRACTTTLinput, sampled each trigger. If high, causes the current record to be subtracted from the accumulation (in external toggle mode). EXTBIN CLK input Rising edge triggers next time binMaximum frequency4 MHz (250 ns minimum bin width) Minimum time high100 ns Minimum time low100 ns Insertion delayRising edge of SYNC/BUSYoutputoccurs at first rising edge of EXT BIN CLK after trigger. The beginning of the first bin occurs at the same time. Counters/AccumulationStanford Research Systemsphone: (408)744-9040 www .thinkSRS.com |
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