CP2200/1 Single-Chip Ethernet Controller - Silicon Laboratories - #1

Text version of the page

Interface Products Copyright © 2006 by Silicon Laboratories 1.11.2006 Host Interface 8KB User Flash 4KB Rx FIFO 2KB Tx Buffer Ethernet MAC Ethernet PHY RX+/RXTX+/ TXClock LED Control 20 MHz RJ-45 ACT LED LINK LED MCU D7-D0 A7-A0 Link Act /INT /WR /RD DGND1 DGND2 AGND MUXEN MOTEN VDD1 VDD2 AV+ XTAL1 XTAL2 /RST 8 x N.C CP2200/1 Single-Chip Ethernet Controller Description The CP2200/1 is a single-chip Ethernet controller containing an integrated IEEE 802.3 Ethernet Media Access Controller (MAC), a 10 BASE-T Physical Layer (PHY), and 8 kB of Non-Volatile Flash Memory available in a 28-pin QFN (5x5 mm) or 48-pin TQFP package. The CP2200/1 can add Ethernet connectivity to any microcontroller or host processor with 11 or more Port I/O pins. The 8-bit parallel interface bus supports both Intel and Motorola bus formats in multiplexed and non-multiplexed mode. The 28-pin QFN device supports multiplexed addressing only. Mode select pins are used to configure the bus interface mode. The on-chip Flash memory may be used to store user constants, web server content, or can be used as general purpose non-volatile memory. The Flash is factory preprogrammed with a unique 48-bit MAC address stored in the last six memory locations. Having a unique MAC address stored in the CP2200/1 often removes the necessary serialization step from the product manufacturing process of most embedded systems. Firmware Features Software Support - Royalty-free TCP/IP stack with device drivers - TCP/IP Configuration Wizard - Hardware diagnostic software and example code Example Applications - Remote sensing and monitoring - Inventory management - VoIP phone adapters - Point-of-sale devices - Network clocks - Embedded web server - Remote Ethernet-to-UART bridge Hardware Features Ethernet Controller - Integrated IEEE 802.3 MAC and 10 BASE-T PHY - Fully compatible with 100/1000 BASE-T networks - Full/Half duplex with auto-negotiation - Automatic polarity detection and correction - Automatic retransmission on collision - Automatic padding and CRC generation - Supports broadcast and multi-cast MAC addressing Parallel Host Interface (30 Mbps Transfer Rate) - 8-bit multiplexed or non-multiplexed mode - Only 11 I/O pins required in multiplexed mode - Intel or Motorola Bus Format - Interrupt on received packets and Wake-on-LAN 8 kB Flash Memory - 8192 bytes of non-volatile user data storage - Factory pre-programmed unique 48-bit MAC address - No external EEPROM required Other Features - LED output drivers (Link/Activity) - Dedicated 2 kB RAM transmit buffer and 4 kB RAM receive FIFO buffer - Power-on Reset - 5 V tolerant I/O Supply Voltage: 3.1 to 3.6 V Package Options - Lead free 48-pin TQFP (9 x 9 mm footprint) - Lead free 28-pin QFN (5 x 5 mm footprint) Temperature Range: –40 to +85 ºC