Any-Rate Precision Clock Solutions - Silicon Laboratories - #1

• Generates any frequency from 2 kHz to 945 MHz and select frequencies to 1.4 GHz from an input frequency of 2 kHz to 710 MHz

• Ultra-low jitter clock outputs with jitter generation as low as 0.3 ps_RM_S (12 kHz to 20 MHz)

• Integrated loop filter with user-selectable loop bandwidth (60 Hz to 8.4 kHz)

• Meets OC-192 GR-253-CORE jitter generation specifications

• Support for ITU G.709 (255/238, 255/237, 255/236) and custom FEC ratios

• Manual or automatic (revertive, non-revertive) input clock selection

• Hitless switching between input clocks in compliance with GR-253-CORE and GR-1244-CORE MTIE specifications

• LOL, LOS and FOS alarm outputs

• User-selectable output clock signal format (LVPECL, LVDS, CML, CMOS)

• Digitally-controlled output phase adjust in 200 ps steps

• PC/SPI programmable or pin controlled

• 1.8, 2.5 or 3.3 V ±10% operation

• Pb-free, RoHS compliant

• SONET/SDH OC-48/OC-192 line cards

• GbE/10GbE, 1/2/4/8/10GFC line cards

• ITU G.709 and custom FEC line cards

• Wireless base stations

• Test and measurement equipment

• Data converter clocking

• DSLAM equipment

• Cable infrastructure

• Optical modules

• SONET/SDH + PDH clock synthesis

Silicon Laboratories' Any-Rate Precision Clocks provide clock multiplication, jitter attenuation and clock distribution in high-performance timing applications requiring sub 1 ps jitter performance. The devices accept multiple clock inputs ranging from 2 kHz to 710 MHz and generate multiple independent, synchronous clock outputs ranging from 2 kHz to 945 MHz and select frequencies to 1.4 GHz. Microprocessor controlled devices provide virtually any frequency translation combination across this operating range. For ease of use, pin-controlled devices are preconfigured to support popular SONET/SDH, Ethernet, Fibre channel and HDTV frequencies. The any-rate precision clocks are based on Silicon Labs third-generation DSPLL® technology, which provides any-rate frequency synthesis and 0.3 psRMS jitter performance in a highly integrated PLL solution that eliminates the need for external VCXO and loop filter components.

SOLUTIONS GUIDE

Optional Crystal/ Refclk

-I h I—T^-*' Output ¹-¹ ^* Clock 1

Input Clock 1

Input Clock N

^-T>—►Output

¹ Clock N

2 kHz to

1400 MHz

2 kHz to 710 MHz

I²C/SPI Port