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SHTxx Application Note CRC
2.1 Bitwise
With the bitwise method, the receiver copies the structure of the CRC generator in hard- or software. An algorithm to calculate this could look like this: 1) Initialise CRC Register to low nibble of status register (reversed
(s s 1 s 2 s 3 ‘0000)) 2) Compare each (transmitted and received) bit with bit 7 3) If the same: shift CRC register, bit0='0' else: shift CRC register and then invert bit4 and bit5, bit0='1' (see figure 1) 4) receive new bit and go to 2) 5) The CRC value retrieved from the SHTxx must be reversed (bit 0 = bit 7, bit 1=bit 6 … bit 7 = bit 0) and can then be compared to the final CRC value.
(2) XOR XOR Input bit
XOR 1 2 3 4 5 6 7
Figure 1 Internal structure of the SHTxx CRC-8 generator >
2.1.1 Example for bitwise Example 2: RH Measurement (as example in datasheet) Example 1: readout of status register containing 0x40
Inputbit’s >
bit7 … bit0 Inputbit’s 0xdecComment >
bit7 … bit0 0xdecComment 0000’0000 Start value see below >
(1) 0000’0000 Start value see below >
(1) 0000’0000 0001 >
st st nd bit of command 0000’0000 0001 >
nd bit of command 0000’0000 0002 bit of command 0000’0000 0002 bit of command 0000’0000 000… 0000’0000 000… 0000’0000 000 0000’0000 000 0000’0000 000 0000’0000 000 1 0011’0001 CRC EXOR polynom 1 0011’0001 CRC EXOR polynom 0110’0010 1 0101’0011 11111’0101 F5245CRC after command 11001’0111 97151CRC after command 1101’1011 1 >
st byte (MSB) of measurement 0001’1111 1 >
st bit (MSB) of status register 1000’0111 1 0000’1111 0011’1111 0001’1110 0111’1110 0011’1100 1 1100’1101 0111’1000 1010’1011 1111’0000 0110’0111 1101’0001 11111’1111 FF255CRC value 01001’0011 93147Final CRC value 1100’1111 2 >
nd byte (LSB) of measurement 1010’1111 1 0101’1110 1 1000’1101 0010’1011 0101’0110 1010’1100 10101’1000 5888Final CRC value >
(1) (2) Low nibble only, whole byte reversed ( Statusregister = [s 7 s 6 s 5 s 4 ‘s 3 s 2 s 1 s ] -> Startvalue = [s s 1 s 2 s 3 ‘0000] ) This is different to other CRC implementations www.sensirion.comRev 1.07 2/4 >