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FFT Cores for FPGA Product Information Sheet

RF EnginesLtd (RFEL) providea range of highspecification FPGA-based Pipelined FastFourierTransform (FFT) cores. The pipelined or streamingarchitecture ensures that all cores can process back-to-back blocks of time-domain input data in real-time.FFT parameterssuch as radix, processing parallelism and bit growth can be tailored by RFEL to suit each application resulting in themost optimal design in terms of silicon,power and performance.Complementary coreoptions include polyphase andstandardwindowing, input buffering forsingle or multiple channel processing, input buffering for overlapped FFT processing, bit-reversal and 100% efficient real input FFT processing.The designsare sold as custom Intellectual Property (IP) cores to equipment manufacturers andallow a lowcost andreduced riskroute to a fasterdesigncycle. Additionally a selection of more than sixty HiSpeed and QuadSpeed FFT cores are available in RFEL’s low cost Xilinx FFT Library.

6.4GHz

11

3.2GHz

12

1.6GHz

HyperSpeed

800MHz

13

400MHz

6 7 8 9

200MHz

QuadSpeed

10 14

100MHz

1 2 3 4 5

50MHz

HiSpeed

25MHz
Susstained ComplexBandwidth 12.5MHz

HyperLength

15

6.25MHz 1k 2k 4k 8k 16k 32k 64k 128k 256k 512k 1M 2M 4M 8M 16M 32M 64M 128M 256M

Complex FFT Length

Figure 1: FFT Product Range Performance Envelopes Figure 1 shows the performance envelopes for RFEL’s FFTcores, implemented in a Xilinx Virtex-II PRO device (XC2VP70-7 FF1517). This graph is intended to illustrate the range of core specifications that can be implemented in a single large FPGA device, plus external memory where appropriate. Specific FFT examples (shown as numbered points) are described later.

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