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DSP, FRAM, Microcontroller, Digital converter, Non-volatile memory
Text version of the page
FM24CL04 AC Parameters
(T A = -40 ° C to + 85 ° C, V DD = 2.7V to 3.65V, C L = 100 pF unless otherwise specified) Symbol Parameter Min Max Min Max Min Max Units Notes f
SCL SCL Clock Frequency 0 100 0 400 0 1000 kHz t
LOW Clock Low Period 4.7 1.3 0.6 µ s t
HIGH Clock High Period 4.0 0.6 0.4 µ s t
AA SCL Low to SDA Data Out Valid 3 0.9 0.55 µ s t
BUF Bus Free Before New Transmission 4.7 1.3 0.5 µ s t
HD:STA Start Condition Hold Time 4.0 0.6 0.25 µ s t
SU:STA Start Condition Setup for Repeated Start 4.7 0.6 0.25 µ s t
HD:DAT Data In Hold 0 0 0 ns t
SU:DAT Data In Setup 250 100 100 ns t
R Input Rise Time 1000 300 300 ns 1 t
F Input Fall Time 300 300 100 ns 1 t
SU:STO Stop Condition Setup 4.0 0.6 0.25 µ s t
DH Data Output Hold (from SCL @ VIL) 0 0 0 ns t
SP Noise Suppression Time Constant on SCL, SDA 50 50 50 ns Notes : All SCL specifications as well as start and stop conditions apply to both read and write operations. 1This parameter is periodically sampled and not 100% tested. Capacitance
(T A = 25 ° C, f=1.0 MHz, V DD = 3V) Symbol Parameter Max Units Notes C
I/O Input/Output Capacitance (SDA) 8 pF 1 C
IN Input Capacitance 6 pF 1 Notes 1This parameter is periodically sampled and not 100% tested. AC Test Conditions Input Pulse Levels 0.1 V
DD to 0.9 V
DD Input rise and fall times 10 ns Input and output timing levels 0.5 V
DD Equivalent AC Load Circuit
Rev. 3.0 March 2005 Page 9 of 11
(T A = -40 ° C to + 85 ° C, V DD = 2.7V to 3.65V, C L = 100 pF unless otherwise specified) Symbol Parameter Min Max Min Max Min Max Units Notes f
SCL SCL Clock Frequency 0 100 0 400 0 1000 kHz t
LOW Clock Low Period 4.7 1.3 0.6 µ s t
HIGH Clock High Period 4.0 0.6 0.4 µ s t
AA SCL Low to SDA Data Out Valid 3 0.9 0.55 µ s t
BUF Bus Free Before New Transmission 4.7 1.3 0.5 µ s t
HD:STA Start Condition Hold Time 4.0 0.6 0.25 µ s t
SU:STA Start Condition Setup for Repeated Start 4.7 0.6 0.25 µ s t
HD:DAT Data In Hold 0 0 0 ns t
SU:DAT Data In Setup 250 100 100 ns t
R Input Rise Time 1000 300 300 ns 1 t
F Input Fall Time 300 300 100 ns 1 t
SU:STO Stop Condition Setup 4.0 0.6 0.25 µ s t
DH Data Output Hold (from SCL @ VIL) 0 0 0 ns t
SP Noise Suppression Time Constant on SCL, SDA 50 50 50 ns Notes : All SCL specifications as well as start and stop conditions apply to both read and write operations. 1This parameter is periodically sampled and not 100% tested. Capacitance
(T A = 25 ° C, f=1.0 MHz, V DD = 3V) Symbol Parameter Max Units Notes C
I/O Input/Output Capacitance (SDA) 8 pF 1 C
IN Input Capacitance 6 pF 1 Notes 1This parameter is periodically sampled and not 100% tested. AC Test Conditions Input Pulse Levels 0.1 V
DD to 0.9 V
DD Input rise and fall times 10 ns Input and output timing levels 0.5 V
DD Equivalent AC Load Circuit
Rev. 3.0 March 2005 Page 9 of 11