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Text version of the page
COMMUNICATION INTERFACE MAXV CONTROLLER INITIALIZATION
MAXv User’s Manual 3-15
TABLE 3-1 MAXv – VME SHARED ADDRESS SPACE MAPPING (con’t)
The remaining 64 bytes are reserved for the controller’s hardware register set:
4032 0xfc0 4 Status Word 1 flag register
4034 0xfc4 4 Status Word 1 interrupt enable register
4036 0xfc8 4 Status Word 2 flag register
4040 0xfcc 4 Status Word 2 interrupt enable register
4044 0xfd0 4 VME IACK ID Vector
4048 0xfd4 4 Controller configuration switch register
4052 0xfd8 4 Address modifier register
4060 0xfdc 28 Reserved
4088 0xff8 4 FIFO Status & Control
4092 0xffc 4 FIFO Data Register
TABLE 3-2 MAXv - Limit Switch Status Word (Word Access Offset 0x40)
Bit Function
Byte access offset 0x43
00 X axis positive limit sensor
01 Y axis positive limit sensor
02 Z axis positive limit sensor
03 T axis positive limit sensor
04 U axis positive limit sensor
05 V axis positive limit sensor
06 R axis positive limit sensor
07 S axis positive limit sensor
Byte access offset 0x42
08 X axis negative limit sensor
09 Y axis negative limit sensor
10 Z axis negative limit sensor
11 T axis negative limit sensor
12 U axis negative limit sensor
13 V axis negative limit sensor
14 R axis negative limit sensor
15 S axis negative limit sensor
Byte access offset 0x41
16 Not used
17 Not used
18 Not used
19 Not used
20 Not used
21 Not used
22 Not used
23 Not used
Byte access offset 0x40
24 Not used
25 Not used
26 Not used
27 Not used
28 Not used
29 Not used
30 Not used
31 Not used
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