MIC2591B Dual-Slot PCI Express Hot-Plug Controller - Micrel - #29

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MIC2591B Micrel March 2005 29 M9999-033105 Common Status Register (CS) 8-Bits, Read/Write Common Status Register (CS) D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] read-write read-write read-only read-only read-write read-write read-write read-only Reserved Reserved GPI_B0 GPI_A0 INTMSK UV_INT OT_INT Reserved Bit(s) Function Operation D[7] Reserved Always read as zero D[6] Reserved Always read as zero GPI_B0 General Purpose Input 0, Slot B State of GPI_B0 pin GPI_A0 General Purpose Input 0, Slot A State of GPI_A0 pin INTMSK Interrupt Mask 0 = /INT generation is enabled 1 = /INT generation is disabled. The MIC2591B does not participate in the SMBus Alert Response Address (ARA) protocol UV_INT Undervoltage Interrupt 0 = No UVLO fault 1 = UVLO fault Set whenever a circuit breaker fault condition occurs as a result of an undervoltage lockout condition on one of the main supply inputs. This bit is only set if a UVLO condition occurs while the ON[A/B] pin is asserted or the MAIN[A/B] control bits are set OT_INT Overtemperature Interrupt 0 = Die Temp 160°C. Set if a fault occurs as a result of the MIC2591B’s die temperature exceeding 160°C D[0] Reserved Undefi ned Power-Up Default Value: 00000000b = 00h Command_Byte Value (R/W): 00000110b = 06h To reset the OT_INT and UV_INT fault bits, a logical 1 must be written back to these bits.