MEN CompactPCI
F206N – 3U CompactPCI
®
Nios
®
II Slave Board
N 32-bit/33-MHz CompactPCI
® N Peripheral slot function
N FPGA 12,000 LEs (approx. 144,000 gates)
N Nios
® II soft processor
N 32 MB SDRAM, 2 MB Flash
N Flexible FPGA-Flash structure
N Open platform FPGA development package
N Support of Wishbone and Avalon
® bus
N -40 to +85°C with qualified componentsCPU
N Two optional plugs for on-board connection via ribbon cable >
Miscellaneous
N Nios >
® II soft processor, 33MHz >
N Four user LEDs, FPGA-controlled >
Memory
N Different physical layers through SA-Adapters >
N Local PCI Bus >
N 512 bytes instruction cache and 512 bytes data cache integrated in Nios >
™ : RS232, RS422, RS485, TTY, Ethernet, CAN bus, binary I/O, audio, PS/2 >
N 32-bit/33-MHz, 3.3V V(I/O) >
® II >
N Compliant with PCI Specification 2.2 >
N 32MB SDRAM system memory >
N One optional 40-pin plug connector >
CompactPCI
® Bus
N Soldered >
N For FPGA-controlled functions >
N Compliance with CompactPCI >
® Core Specification PICMG 2.0 R3.0 >
N 133MHz memory bus frequency >
N For use of SA-Adapters >
™ N 2MB boot Flash >
N For on-board connection via ribbon cable >
N Peripheral slot >
I/O
N Different physical layers through SA- Adapters >
N 32-bit/33-MHz PCI >
N One RS232 UART (COM10) >
™ : RS232, RS422, RS485, TTY, Ethernet, CAN bus, binary I/O, audio, PS/2 >
N V(I/O): +3.3V >
CompactPCI N D-Sub connector at front panel >
N Only one slot required on 3U cPCI >
® backplane >
N Data rates up to 115kbits/s >
FPGA
N More supplementary CompactPCI >
® slots required depending on SA-Adapters >
N 60-byte transmit/receive buffer >
N Standard factory FPGA configuration: >
™ N Handshake lines: full support >
N Nios >
® II soft processor >
Electrical Specifications
N For debugging >
N 16Z014_PCI - PCI to Wishbone interface >
N Supply voltage/power consumption: >
N Three 10-pin
industrial connectors >
N 16Z052_GIRQ - Global Interrupt Contr. (Nios >
® ) >
N +5V (-3%/+5%), current depends only on mounted SA-Adapters >
N For FPGA-controlled functions >
N 16Z052_GIRQ - Global Interrupt Contr. (CPU) >
™ N For use of SA-Adapters >
™ N 16Z069_RST - Reset Controller >
N +3.3V (-3%/+5%), 500mA typ. >
N One receptacle for direct SA-Adapter >
™ N 16Z043_SDRAM - SDRAM controller (32MB) >
N MTBF: 308,000h @ 40°C (derived from MIL-HDBK-217F) connection at the front >
N 16Z045_FLASH - Flash interface >
N Two receptacles for direct connection of long SA-Adapters >
N 16Z025_UART - UART contr. (contr. COM10) >
™ at the front >
N The FPGA offers the possibility to add customized I/O functionality. See website. >
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F206I