LATTICE EVALUATION BOARDS
MachXO Evaluation Board Product Brochure - 30624 MachXO Starter
EvaluationBoard
Ready-Made Platform for MachXO256 – Includes AC Adapter & Download Cable
The MachXO™ Starter Evaluation Board is a complete work-ing solution for the MachXO crossover programmable logic technology. Efficiently packed with a rich set of features, the MachXO Starter Evaluation Board is a simple, yet versatile solution allowing for detailed analysis of the MachXO perfor-
mance and technology. The board is also a convenient plat-form to help you get started with your own MachXO design.
MachXO Starter Evaluation Board
(actual size) () 8 9 8
Efficient and Flexible Design
1 The MachXO Starter Evaluation Board is packed with basic building blocks that can be used to demonstrate any number of programmable logic features or functions: I/O Evaluation 10 10 Measure the drive strength, speed, and switching character-istics of the MachXO I/Os, configured to whatever specifica-tion you program. 4 Measure Power Consumption 8 Check the actual power consumption of a MachXO design, see how changes in your design, and various MachXO set-tings, affect power results. 11 7 5 In-System Evaluation Use the prototype area to connect to any number of instru-
ments or see how the MachXO interfaces with other technol-ogy. 2 3 6 Discover Lattice Technology The MachXO Starter Evaluation Board, along with down-loadable
software tools, give you everything you need to evaluate the entire Lattice design flow without making a huge investment.
Key Features
1. MachXO device (LCMXO256C-4T100C) 2. Power input jack 3. 33MHz oscillator 4. Status LEDs, and 9 I/O LEDs 5. 8-bit input switch 6. 2 push-button switches 7. JTAG programming interface - Download cable included (HW-DL-3C)
MachXO – Crossover PLD
The MachXO family of non-volatile, infinitely reconfigurable Programmable Logic Devices (PLDs) is designed for applica-tions traditionally implemented using CPLDs or low-capacity FPGAs. The MachXO family combines an optimized Look-Up Table (LUT) fabric with Lattice’s ispXP™ technology to provide the high pin-to-pin performance and instant-on associated with CPLDs, with the flexibility of FPGAs, all in a single low-cost device. 8. Access to all device I/O 9. Prototyping area MachXO Configuration 10. Landing pads for off-board expansion connectors 11. On-board power control - AC adapter included
Ordering Information
MachXO evaluation board with LCMXO256C-4T100C device, ispDOWNLOAD ProductDescriptionOrdering Part # MachXO Starter Evaluation Board ® MachXO Device Cable, and AC adapterLCMXO256C-S-EV Flash Memory
Only
Use JTAG port (IEEE1532/1149.1) to configure SRAM or program Flash. Massively parallelwide data transferprovides snoop-proofSRAM configurationfrom Flash.On-chip Flash memory. SRAM Configuration Bits(Controls Device Operation)
Control Logic JTAGPort G Order online or callyour local Latticerepresentative Orderonlineorcall
$99!
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