ispClock5300S Product Brief - Lattice Semiconductor - #2

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Design Made Simple with PAC-Designer Software
Lattice's PAC-Designer® software, a PC-based software tool, and Frequency Synthesizer enable easy configuration of provides simple and intuitive pull-down menus for config- various counters and other options. Configurations can be uring all programmable features of the device. In addition, downloaded into ispClock devices from a PC parallel port.
design utilities like the Skew Editor, Frequency Calculator
Download and Verify Design with Evaluation Board.
2. Set Output Clock Properties.
4. Set Individual Clock Output Skews.
. Set Input and Output Clock Frequencies.
ispClock5300S Attributes
Application Diagram
The ispClock5300S is a PLD that can be used as a standard clock distribution IC across all designs.
■ Integrates fan-out buffers, zero-delay buffers and termination resistors
■ No trace snaking necessary
■ Offers JTAG bounday scan feature
ispClock5300S Device
Feature
5304S 5308S 5312S 5316S 5320S
Outputs
4 8 12 16 20
I/O Frequency Ranges
8 to 267MHz (input), 5 to 267MHz (output)
VCO Operation
160 to 400MHz
Spread Spectrum Compatibility
Yes
Programmable Input Types
LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, Diff. SSTL, Diff. HSTL
Programmable Output and Feedback Interface Types
LVTTL, LVCMOS, SSTL, HSTL
Type of PLL Feedback
External/Internal
Maximum Output Skew
100ps
Maximum Period Jitter (RMS)
12ps
Maximum Static Phase Offset
-40ps to 100ps
Programmable Skew
156ps to 5ns
Programmable Termination
40 to 70D & 20D Setting
Package
48 TQFP 64 TQFP
■>f1 LVCMOS 3.3V ■>f1 LVCMOS 3.3V
FOB
fi >-
► f2 LVCMOS 1.8V f2 LVCMOS 1.8V
f2 >-
m
_fT~i-^wv-ririr>
LVCMOS 3.3V
{{ijUattice
ispClock 5300S
fi
Applications Support
1-800-LATTICE (528-8423) (503) 268-8001 isppacs@latticesemi.com
www.latticesemi.com
-►f1 LVCMOS 3.3V -*f2 LVCMOS 1.8V
f2
Semiconductor ■ ■■■■■ Corporation
More of the Best
-*f2 LVCMOS 1.8V
Copyright © 2007 Lattice Semiconductor Corporation. Lattice Semiconductor, L (stylized) Lattice Semiconductor Corp., Lattice (design), ispClock, ispPAC, PAC-Designer and ispDOWNLOAD are either registered trademarks or trademarks of Lattice Semiconductor Corporation in the United States and/or other countries. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
September 2007 Order #: I0193

pageCatalog pdf di En 2012-05-22-30