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I0195 PCIe Solutions Brochure - Lattice Semiconductor


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Lattice PCIe Solutions
Ready-to-Use PCIe Portfolio
Lattice provides customers with low cost and low power program­mable solutions that are ready-to-use right out of the box. A full suite of tested and interoperable solutions is available for PCI Express, including:
■ FPGAs with Embedded PCIe-Compliant SERDES
■ A Complete Portfolio of Soft and Hard IP Cores for PCI Express x1 and x4, and DMA
■ Application Specific Development Boards, Systems and Reference Designs
■ Test and Interoperability Reports for PMA Electrical Characterization and PCI-SIG Compliance Workshop
Silicon: Industry Leading Programmable PCIe Platforms
LatticeSC™ Extreme Performance FPGA
LatticeECP2M™ Low Cost FPGA
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Quad SERDES + Embedded PCS - each channel runs from 600Mbps to 3.8Gbps with 105mW power dissipation.
Programmable Function Unit (PFU)
perform Logic, Arithmetic, Distributed RAM and Distributed ROM functions.
- Programmable I/O Cells (PICs) include PURESPEED™ buffers that support over 20 I/O standards.
- Structured ASIC Block (MACO®)
provides 50,000 usable gates for increased performance, density and lower power.
-Embedded 3.125Gbps SERDES support PCI Express, Ethernet (1GbE, SGMII, CPRI, and OBSAI).
-Programmable Function Unit (PFU)
perform Logic, Arithmetic, Distributed RAM and Distributed ROM functions.
Pre-Engineered Source Synchronous Support implements DDR2 at 533Mbps, SPI4.2 at 750Mbps and generic interfaces up to 840Mbps.
sysDSP™ Blocks implement multipliers, adders, subtractors, accumulators.
' sysMEM Embedded Block RAM (EBR)
provides 18kbit dual port RAM.
- sysCLOCK PLLs & DLLs for clock management.
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vsysMEM™ Embedded Block RAM (EBR)
provides 18kbit dual port RAM.
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sysCLOCK™ PLLs & DLLs for clock management.
LatticeSC Features
■ High Performance Analog SERDES
• Compliant to PCI Express vl.l electrical specifications
• Ideal for long PCI Express based backplanes
■ Up to 32 Channels per Device
• Useful for multi-protocol bridging
■ Complete End-to-End Solution
• Rich PCS functionality
• flexiMAC™ and MACO® LTSSM provide complete PHY and DL functionality in hard gates
• Soft transaction available
■ Very Low Power (105mW Per Channel Typical @ 3.125Gbps)
■ Extreme Performance FPGA Fabric
• 500MHz block-level performance
LatticeECP2M Features
■ Low Cost Digital SERDES
• Compliant to PCI Express vl.l electrical specifications
■ Up to 16 Channels per Device
• Useful for multi-protocol bridging
■ Complete End-to-End Solution
• PIPE compliant PCS
• PCI Express xl and x4 soft IP available
Very Low Power (lOOmW Per Channel Typical @ 2.5Gbps)
Low Cost FPGA Fabric
• High end features at low cost
LATTICE: MORE OF THE BEST

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