AN978a

Q
g =Gate charge of high side FET f =frequency of operation I
cbs(leak) =Bootstrap capacitor leakage current I
lson =20mA, I
lsoff =20mA, t
w =200ns V
f = Forward voltage drop across the bootstrap diode V
LS = Voltage drop across the low side FET or load Q
ls = level shift charge required per cycle = 5nC (500V/600V IC’s) or 20nC (1200V IC’s)The bootstrap diode must be able to block the full voltage seen in the specific circuit; in the circuits of Figures 25, 28 and 29 this occurswhen the top device is on and is about equal to the voltage across the power rail. The current rating of the diode is the product of gatecharge times switching frequency. For an IRF450 HEXFET power MOSFET operating at 100kHz it is approximately 12mA.The high temperature reverse leakage characteristic of this diode can be an important parameter in those applications where the capacitorhas to hold the charge for a prolonged period of time. For the same reason it is important that this diode be ultrafast recovery to reduce theamount of charge that is fed back from the bootstrap capacitor into the supply.

4. HOW TO CALCULATE THE POWER DISSIPATION IN AN MGD

The total losses in an MGD result from a number of factors that can be grouped under high voltage and low voltage static and dynamic.a)Low voltage static losses (P
D(1v)q ) are due to the quiescent currents from the three low voltage supplies V
DD , V
CC and V
SS . In a typical15V application these losses amount to approximately 3.5mW at 25°C, going to 5mW at T
J = 125 °C .b) Low voltage dynamic losses (P
D(lv)SW ) on the V
CC supply are due to two different components:b1) Whenever a capacitor is charged or discharged through a resistor, half of energy that goes into the capacitance is dissipated in theresistor. Thus, the losses in the gate drive resistance, internal and external to the MGD, for one complete cycle is the following:P
G = V • Q
G • fFor two IRF450 HEXFETs operated at 100kHz with Vgs = 15V, we have:PG = 2 • 15 • 120 E 10
-9 • 100 E 10
3 = 0.36WThe factor 2 in the formula is valid in the assumption that two devices are being driven, one per channel. If V
SS is generated with a bootstrapcapacitor/diode, this power is supplied from V
CC . The use of gate resistors reduces the amount of gate drive power that is dissipated insidethe MGD by the ratio of the respective resistances. If the internal resistance is 6 Ohms, sourcing or sinking, and if the gate resistor is 10Ohms, only 6/16 of P
G is dissipated within the MGD. These losses are not temperature dependent.b2)Dynamic losses associated with the switching of the internal CMOS circuitry. They can be approximated with the following formula:P
CMOS = V
CC • Q
CMOS • fwith Q
CMOS between 5 and 30nC, depending on MGD. In a typical 100kHz application these losses would amount to tens of mW, largelyindependent from temperature. c)High voltage static losses (P
D(hv)q ) are mainly due to the leakage currents in the level shifting stage. They are dependent on thevoltage applied on the V
S pin and they are proportional to the duty cycle, since they only occur when the high side power device ison. If Vs were kept continuously at 400V they would typically be 0.06mW at 25°C, going to 2.25mW at 125°C. These losses would be virtually zero if V
S is grounded, as in a push-pull or similar topology.

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