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netX 5 –networX on chipNetwork Access ControllerDescriptionFlexible Network Access Controller Two communication channelsconfigurable between Real-Time Ethernet and fieldbusSupported Real-Time-Ethernet- Systems Two MII Ports with IEEE 1588for EtherCAT with 8x Sync / FMMU Powerlink with integrated hub PROFINET IRT with 2-Port switch SERCOS III and others Fieldbus controller for AS-Interface CANopen and DeviceNet CC-Link PROFIBUS 8/16/32 Bit Dual-Port-Memoryor serial SPI Host interface The netX 5 is a highly integrated Network AccessController with new, flexible, system architecture. It belongs to the family of netX network controllers,but does not possess its own ARM CPU.With its integrated Dual-Port-Memory or the serial SPI interface, it operates as a companion chip to aHost CPU and makes available the whole spec-trum of industrial communication from fieldbus up to the various Real-Time-Ethernet systems. Exter- nal PHYs must be connected to the two MII inter-face for Ethernet purposes.Both transmission channels are used for Real- Time Ethernet, whereas these can be combinedas required when configuring as fieldbus control-lers. Also of interest is a common controller for Ethernet/IP and DeviceNet, which, with the inte-grated IEEE 1588 unit, also supports CIP Sync.The areas of application are communication inter-faces in which the Host processor has sufficientcomputing power to process the whole transmis- sion protocol. The communication channels are designed to becompatible with the other controllers of the netXfamily. They consist of dedicated ALUs and special logicunits, which are allocated by their respective pro-tocol functions by means of microcode.The xMAC Medium-Access-Controller transmits or receives data in accordance with the respective busaccess procedures and codes or converts theseinto a Byte depiction. The xPEC Protocol Execution Controller combinesthese into data packets and controls the telegramtraffic. Large data quantities are transmitted per DMA blocks into, or out of, the integrated buffer memory whilst a Dual-Port-Memory is available foreach channel for status information. Alternatively aTriple-Buffer logic is implemented, which always provides the address of the next free buffer for pur-poses of conflict-free data exchange. SupportedFieldbus-Systems Master only Slave only With the intelligent communication ALUs, the netXprocesses the most varied protocols and protocol combinations in a single chip – an absolutely newfeature in industrial communication technology. |
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