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netX 100/500 –networX on chipThe future of communication

Description

Flexible “high end” networkcontroller or highly integrated single chip solution for applica- tions and communication Four communication channels as Real-Time Ethernet or fieldbus interface individually configurable
Supported Real-Time-Ethernet- Systems New system architecture optimized for communication and high data throughput 32-Bit/200MHz CPU ARM 926 with 200 MIPs computing power for Windows CE and Linux Dual-port-memory, AD conver- ter and graphic controller on chip
The netX is a highly integrated network controllerwith a new system architecture optimized for com-munication and maximum data throughput.Based on the 32-Bit CPU ARM 926EJ-S cycled at200 MHz, it possesses a memory managementunit, caches, DSP and Java extensions. The inter- nal memory of 144 KByte RAM and 32 KByteROM that contains the Bootloader is sufficient forsmaller applications whereas for Windows CE and Linux it is supplemented with the 32 Bit Memory Controller memory externally with SDRAM, SRAMor FLASH. The connection to a primary Host iscarried out via the Dual-port-memory interface, which is configurable for stand-alone applicationsalso as a 16 Bit extension bus. Comprehensiveperipheral functions, serial interfaces such as UART, USB, SPI, I SupportedFieldbus-Systems Master only Slave only ² C as well as the integrated gra-phic controller permit a wide spectrum of applicati-ons. Yet, it is the central data switch and the fourfreely configurable communication channels with their own intelligence that is the main characteri-stic of the netX as a "high end” network controller.The data switch connects via five data paths to theARM CPU and the communication, graphic andHost controllers with the memory or the peripheral units. In this way the controllers transmit their data inparallel, contrary to the traditional sequential archi- tecture with only one common data bus and addi- tional bus allocation cycles. The controllers of the four communication chan-nels are structured on two levels and are identical to each other. They consist of dedicated ALUs andspecial logic units that receive their protocol func-tions via Microcode. Two channels posses an additional integrated PHY for Ethernet. The Medium-Access-Controller xMAC sends orreceives the data according to the respective bus access process and encrypts or converts these into Byte depictions. The Protocol Execution Controller xPEC compilesthese into data packets and controls the telegram traffic. These are exchanged in DMA blocks overthe memory of the ARM. In addition, every chan-nel has a Dual-port-memory available for status information or as local data picture. With the intelligent communication ALUs, the netXcarries out the most varied protocols and protocolcombinations and can synchronize them indepen-dently of the reaction time of the CPU – an abso- lutely new feature in industrial communicationtechnology.