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MainBoard

2008-2009 Telemetry / Telecom series catalog - 7102 PCIe8 LX

PCI Express 8-lane high-speed DMA and data processing interface Description
e PCIe8 LX (for PCI Express) is a main board that supports a mezzanine board with high-speed DMA and other resources. It has a programmable FPGA (Xilinx Virtex 5 LXT) and syn- chronous memory of 8 MB SRAM and up to 2 GB 200-pin SODIMM DDR2 DRAM. e board also has four independent programmable PLL clock generators, which can be set to select frequencies from 1 to 45 MHz with an error rate of less than +/- 50 ppm. e board works with numerous EDT mezzanine boards and the Time Distribution auxiliary board. An EDT Bridge is available to connect two main boards. Applications
EDT mezzanine board support on PCI Express platforms Features
Main board (fits in an 8- or 16-lane PCIe slot) — supports an EDT mezzanine board with high-speed DMA, programmable FPGA resources, and memory221 LVTTL programmable signals connected to mezzanine boardFPGA: One programmable Xilinx Virtex 5 LXT XC5VLX110T/220T/330T SRAM: 8 MBDRAM: Up to 2 GB (DDR2) Clocks: Four independent programmable PLL clock generators 38