2008-2009 Telemetry / Telecom series catalog - EDT - #33

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Specifications

Product TypeFPGAs and Memory Graychips Sample Clock and Converter (A/D) Data RatesData Format (I/O) Reference - Internal Connectors CablingPhysical Environmental System and Software SRXL is a signal receiver mezzanine board for L-band and IF; it requires a main board.One programmable FPGA (Xilinx Spartan 3 XC3S1500), plus FPGA and memory resources on main board 2 or optional 0 (TI GC4016) for digital down-conversion Sample clock tuning range / tuning word (DDS) 1 to 65 MHz / 32-bit word User-defined sample clock From FPGA pin phase-locked to 10 MHz reference Converter resolution 12 bitsData rates are dependent on data format and main board. Reference - External L-band (925-2175 MHz, IF (65-225 MHz, General (10 MHz) 5 MHz tuning resolution) 1 MHz tuning resolution) Nominal input impedance 50 Ω 75 Ω 75 Ω Minimum return loss 12 dB 12 dB 12 dB Gain control Minimum RF - 60 dB - Minimum base band - 19 dB - Minimum variable - - 43 dB Typical variable - - 60 dB Signal level Minimum usable -10 dB –72 dBm –76 dBm Maximum usable 10 dB 3 dBm –19 dBm Absolute maximum 16 dBm (with DC, if any) 10 dBm 10 dBm Phase noise At 40 KHz (measured) - -72 dB -72 dB At 10 KHz (measured) - -50 dB -65 dB Local Oscillators Tuning ranges - 925 to 2175 MHz 63 to 112 MHz or 125 to 225 MHz Tuning step size - 5 MHz 1 MHz Demodulators Base band LP filter cutoff - 4 to 33 MHz (–3 dB) 23 MHz Transition band - 42 dB/octave 24 dB/octave Maximum IQ phase error - 4 degrees 3 degrees Maximum IQ gain error - 1.2 dB 0.6 dB Reference - Internal Frequency (10 MHz) Nominal tolerance +/- 0.5 ppm at 25° C Over temperature +/- 2.5 ppm at 0° to 75° C Adjustment range +/- 3 ppm Reference - External L-band IF Connector type SMB 50 Ω F-type 75 Ω SMB 75 Ω Consult EDT for purchase options. Weight 3.6 oz. typical Dimensions 6.6 x 4.2 x 0.5 in. (with a main board)Temperature Operating 0° to 40° C Non-operating -40° to 70° C Humidity Operating 1% to 90%, non-condensing at 40° C Non-operating 95%, non-condensing at 45° CFor details on system requirements and EDT-provided software driver packages, see specifications for your EDT main board.

Ordering Options

- Main board: PCI SS / PCI GS / PCIe8 LX - Graychips: 0 / 2 Bold is default. For more options, see main board datasheet. Ask about custom options. 31

pageCatalog pdf di En 2012-02-07-17