2008-2009 Telemetry / Telecom series catalog - EDT - #32

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MezzanineBoard

2008-2009 Telemetry / Telecom series catalog - 7102 SRXL

Signal receiver and processor for L-band and IF

Description

e SRXL is a mezzanine board that pairs with an EDT main board (for PCI or PCI Express) to accept simulta- neous RF inputs in the L-band range of 925 to 2175 MHz and the IF range of 65 to 225 MHz. Each input is processed with a tun- able quadrature down-converter. e resulting baseband I and Q signals are low-pass filtered and digitized with 12- bit precision at programmable sample rates up to 65 MHz. e resulting four channels of digital sample data are available as inputs to the Xilinx Spartan 3 FPGA, which is programmable to perform signal processing or to serve as a configurable switch matrix to route data to the main board and up to two 4-channel digital down-converter Graychips (GC4016). e main board supplies high-speed DMA, plus additional memory and programmable FPGA resources.

Features Applications

Mezzanine board — pairs with an EDT main board (in a PCI, PCI-X, or PCIe slot), which adds high-speed DMA, programmable FPGA resources, and memorySimultaneous L-band and IF analog-to-digital conversion (12-bit)L-band: 925 to 2175 MHz (66 MHz bandwidth) with 5 MHz tuning resolutionIF: 65 to 225 MHz (46 Satellite receiver Software-defined radio Surveillance / spectrum monitoring Digital tuning Test and measurement equipment MHz bandwidth) with 1 MHz tuning resolutionFPGA: One programmable Xilinx Spartan 3 XC3S1500 Graychips: Two optional (TI GC4016) for 8-channel digital down-conversion Sample clock: Programmable to any frequency from 1 to 65 MHz Reference clock: Onboard 10 MHz TCXO or optional external reference input
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