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| | | Assembly Guidelines | | |
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| | | DIMENSIONS AT AMBIENT TEMPERATURE | | |
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| | | SUBSTRATE LINEAR DISPLACEMENT PUTS SOLDER JOINT AND CAPACITOR IN TENSION | | |
| | | CAPACITOR | | |
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| | | Toper > TambCTE sub > CTEc | | |
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| | | SUBSTRATE | | |
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| | | SUBSTRATE LINEAR DISPLACEMENT PUTS SOLDER JOINT AND CAPACITOR IN COMPRESSION | | |
| | | CAPACITOR | | |
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| | | ■7-7-7-7-7-7-7 SUBSTRATE | | |
| | | Figure 3. "J" and "L" Leadframes Mounted on Capacitors to Relieve Stress Inductance Adding leadframes has a small impact on component inductance but this is the price that must be paid for reliable operation over temperature. Figure 4 shows typical leadframe inductance that is added for two lead standoff distances (0.020" and 0.050") versus the number of leads along one side of SupraCap® which are specifically designed output filter capacitors for 1 MHz and above switchers. The actual inductance will be somewhat less because the leadframes flare out from the lead where the lead-frame is attached to the capacitor body. | | |
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| | | Toper > Tamb CTE sub < CTE c | | |
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| | | Figure 1. Linear Displacement Between Component and Substrate General Processing Guidelines Figure 2 shows the location of maximum stress in the solder joint due to positive and negative DCTE and linear displacement. SOLDER FILLET | | |
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| | | S^ess for Toper > TambCTE sub > CTEcap | | |
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| | | MAXIMUM STRESS | | |
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| | | SOLDER FILLET | | |
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| | | 5 10 15 Number of leads on one side of Capacitor | | 20 | | |
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| | | Figure 4. Number of Leads on One Side of Capacitor vs. Total Leadframe Inductance vs. Substrate Standoff Height Very high frequency professional switch mode switched mode power supplies place tremendous restrictions on output filter capacitors. In addition to handling high ripple current (low ESR), ESL must approach zero nano henrys, part must be truly surface mountable and be available in new configurations to be integrated into transmission lines to further reduce inductance with load currents greater than 40A at 1 MHz and as frequencies move above 1-2 MHz. The total inductance is the sum of each side of the part where the inductance of one side is the parallel combination of each lead in the leadframe. That inductance is given by: L (nH) = 5x€ [In (2x€) / (B+C) + 1/2] Where € = lead length in inches In = natural log B+C = lead cross section in inches so L1 (nH) = 2xL (nH) where L1 is the total inductance of the leadframe. | | |
| | | Stress for- Toper > TambCTE sub < CTE cap Figure 2 Stress Relief Leadframes on larger capacitor sizes (greater than 2225) must be used to minimize mechanical stress on the solder joints during temperature cycling which is normal operation for power supplies (Figure 3). Failing solder joints increase both ESR and ESL causing an increase in ripple, noise and heat, accelerating failure. Layout Effective solder dams must be used to keep all molten solder on the solder lands during reflow or solder will migrate away from the land, causing opens or weak solder joints. High frequency output professional filters cannot use low power layout techniques such as necked down conductors because of the stringent inductance requirements. | | |
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