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Power Architecture 405GP processor

Specifications

133MHz13-Bit address 32-Bit data66MHz32-Bit address 32-Bit data 33/66MHz32-Bit data

CPU Complex Power Architecture 405 processor coreUp to 266 MHz/404 DMIPS 16KB I-cache/8KB D-cache

SDRAMController
ExternalBusController PCIInterface
IIC Code Decompression
UART

Memory and Bus Architecture SDRAM controller On-chip 4KB SRAM External bus controller

Processor Local Bus (PLB)133MHz

Arbiter

64-Bit

UART

System Resources

GPIO

Up to 24 general purpose I/Os DMA controller

16KI-Cache8KD-Cache 4KBSRAM DMAControllerOPBBridge
Timers

High Speed & Inter-Chip Connectivity

MMU SRAMController

32-bit PCI controller, 66 MHz (PCI v2.2 compliant) Master and slave IIC controller

MAL
On-ChipPeripheralBus(OPB)66MHz 405 CPU 10/100EthernetMAC

Network Connectivity

JTAG Trace InterruptController Arbiter

10/100 Ethernet MAC Two UARTs

PowerPC 405 Core

Power 1.5W typical power @ 200 MHz •• ••• ••••••••

PPC405GP-3BE266CZ

AMCC Part NameShipping Package z = tape/reel blank=tray Case Temperature Range C = -40C to 85C Processor Speed 133, 200 and 266 MHzRevision Level E = 3.1Grade 3 ReliabilityPackage (EPBGA) B = 35mm D = 27mm F = 35mm lead free K = 27mm lead free

Target Applications

Internet and communicationsWide variety of embedded networking applications••