50 MHz, 80 dB Demodulating Logarithmic Amplifier with Limiter Output - Analog Devices - #1

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REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a 50 MHz, 80 dB Demodulating Logarithmic Amplifier with Limiter Output AD606 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 FEATURES Logarithmic Amplifier Performance –75 dBm to +5 dBm Dynamic Range £1.5 nV/ÖHz Input Noise Usable to >50 MHz 37.5 mV/dB Voltage Output On-Chip Low-Pass Output Filter Limiter Performance 61 dB Output Flatness over 80 dB Range 638 Phase Stability at 10.7 MHz over 80 dB Range Adjustable Output Amplitude Low Power +5 V Single Supply Operation 65 mW Typical Power Consumption CMOS-Compatible Power-Down to 325 mW typ <5 ms Enable/Disable Time APPLICATIONS Ultrasound and Sonar Processing Phase-Stable Limiting Amplifier to 100 MHz Received Signal Strength Indicator (RSSI) Wide Range Signal and Power Measurement PRODUCT DESCRIPTION The AD606 is a complete, monolithic logarithmic amplifier using a 9-stage “successive-detection” technique. It provides both logarithmic and limited outputs. The logarithmic output is from a three-pole post-demodulation low-pass filter and provides a loadable output voltage of +0.1 V dc to +4 V dc. The logarithmic scaling is such that the output is +0.5 V for a sinusoidal input of –75 dBm and +3.5 V at an input of +5 dBm; over this range the logarithmic linearity is typically within ±0.4 dB. All scaling parameters are proportional to the supply voltage. The AD606 can operate above and below these limits, with reduced linearity, to provide as much as 90 dB of conversion range. A second low-pass filter automatically nulls the input offset of the first stage down to the submicrovolt level. Adding external capacitors to both filters allows operation at input frequencies as low as a few hertz. The AD606’s limiter output provides a hard-limited signal output as a differential current of ±1.2 mA from open-collector outputs. In a typical application, both of these outputs are loaded by 200 W resistors to provide a voltage gain of more than 90 dB from the input. Transition times are 1.5 ns, and the phase is stable to within ±3° at 10.7 MHz for signals from –75 dBm to +5 dBm. The logarithmic amplifier operates from a single +5 V supply and typically consumes 65 mW. It is enabled by a CMOS logic level voltage input, with a response time of <5 ms. When disabled, the standby power is reduced to <1 mW within 5 ms. The AD606J is specified for the commercial temperature range of 0°C to +70°C and is available in 16-lead plastic DIPs or SOICs. Consult the factory for other packages and temperature ranges. FUNCTIONAL BLOCK DIAGRAM REFERENCE AND POWER-UP ONE-POLE FILTER FINAL MAIN SIGNAL PATH LIMITER 11.15dB/STAGE OFFSET-NULL LOW-PASS FILTER 30pF 30pF 360kV 360kV 2pF 9.375kV 9.375kV 2pF X2 TWO-POLE SALLEN-KEY FILTER 12mA/dB 2mA/dB HIGH-END DETECTORS AD606 1.5kV 1.5kV 250V 30kV 30kV 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 INLO COMM ISUM ILOG BFIN VLOG OPCM LMLO INHI COMM PRUP VPOS FIL1 FIL2 LADJ LMHI X1