You may also be interested in
ASIC, Gate array, Processor card, SPLD, FPGA
Text version of the page
1.Arria GX Device FamilyOverviewAGX51001-1.2IntroductionThe ArriaTM GX family of devices combines 3.125 gigabits per second (Gbps) serial transceivers with reliable packaging technology and a proven logic array. Arria GX devices include 4 to 12 high-speed transceiver channels, each incorporating clock/data recovery (CDR) technology and embedded SERDES circuitry designed to support PCI-Express, Gigabit Ethernet, SDI, SerialLite II, XAUI, and SerialRapidIO protocols, along with the ability to develop proprietary, serial-based IP using its Basic mode. The transceivers build upon the success of Stratix II GX family. The Arria GX FPGA technology offers a 1.2-V logic array with the right level of performance and dependability needed to support these mainstream protocols. FeaturesThe key device features for the Arria GX include:■ Transceiver block features ● High-speed serial transceiver channels with clock/data recovery support up to 3.125 Gbps. ● Devices available with 4, 8, or 12 high-speed full-duplex serial transceiver channels ● Support for the following CDR-based bus standards PCI Express, Gigabit Ethernet, SDI, SerialLite II, XAUI, and Serial RapidIO, along with the ability to develop proprietary, serial-based IP using its Basic mode ● Individual transmitter and receiver channel power-down capability for reduced power consumption during non-operation ● 1.2- and 1.5-V pseudo current mode logic (PCML) support on transmitter output buffers ● Receiver indicator for loss of signal (available only in PCI Express (PIPE) mode) ● Hot socketing feature for hot plug-in or hot swap and power sequencing support without the use of external devices ● Dedicated circuitry that is compliant with PIPE, XAUI, GIGE, SDI, and Serial RapidIO ● 8B/10B encoder/decoder performs 8-bit to 10-bit encoding and 10-bit to 8-bit decoding ● Phase compensation FIFO buffer performs clock domain translation between the transceiver block and the logic array ● Channel aligner compliant with XAUI Altera Corporation 11May 2008 |
|